powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig

[platform/kernel/u-boot.git] / include / configs / T208xQDS.h

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 1dcf277..f09a9dd 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -36,7 +36,6 @@
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
 
 #define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
 #define CONFIG_SPL_MAX_SIZE            0x28000
 #define RESET_VECTOR_OFFSET            0x27FFC
@@ -52,13 +51,11 @@
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 << 10)
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #if defined(CONFIG_ARCH_T2080)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
 #elif defined(CONFIG_ARCH_T2081)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
 #endif
-#define CONFIG_SPL_NAND_BOOT
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -68,7 +65,6 @@
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x00200000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (256 << 10)
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
@@ -77,7 +73,6 @@
 #elif defined(CONFIG_ARCH_T2081)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
 #endif
-#define CONFIG_SPL_SPI_BOOT
 #endif
 
 #ifdef CONFIG_SDCARD
@@ -86,7 +81,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x00200000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x00200000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (260 << 10)
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
@@ -95,7 +89,6 @@
 #elif defined(CONFIG_ARCH_T2081)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_sd_rcw.cfg
 #endif
-#define CONFIG_SPL_MMC_BOOT
 #endif
 
 #endif /* CONFIG_RAMBOOT_PBL */
@@ -125,10 +118,6 @@
 #endif
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000     /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000   /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
@@ -189,9 +178,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
@@ -495,12 +482,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#ifdef CONFIG_SPI_FLASH
-
-#define CONFIG_SPI_FLASH_BAR
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE   0
-#endif
 
 /*
  * General PCI
@@ -510,7 +491,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE3           /* PCIE controller 3 */
 #define CONFIG_PCIE4           /* PCIE controller 4 */
-#define CONFIG_FSL_PCIE_RESET   /* pcie reset fix link width 2x-4x*/
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
@@ -597,7 +577,6 @@ unsigned long get_board_ddr_clk(void);
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR        0x110000
 #elif defined(CONFIG_SDCARD)
 /*
@@ -605,10 +584,8 @@ unsigned long get_board_ddr_clk(void);
  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
  */
-#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 0x820)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #define CONFIG_SYS_FMAN_FW_ADDR        (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
@@ -618,10 +595,8 @@ unsigned long get_board_ddr_clk(void);
  * slave SRIO or PCIE outbound window->master inbound window->
  * master LAW->the ucode address in master's memory space.
  */
-#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
 #define CONFIG_SYS_FMAN_FW_ADDR        0xFFE00000
 #else
-#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #define CONFIG_SYS_FMAN_FW_ADDR        0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
@@ -629,7 +604,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
 #define CONFIG_PHY_TERANETICS