#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_PAD_TO 0x40000
-#define CONFIG_SPL_MAX_SIZE 0x28000
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_SKIP_RELOCATE
-#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
+#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#endif
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \
+ 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
-#define CONFIG_FSL_QIXIS /* use common QIXIS code */
#define QIXIS_BASE 0xffdf0000
#define QIXIS_LBMAP_SWITCH 6
#define QIXIS_LBMAP_MASK 0x0f