configs: migrate CONFIG_VIDEO_BMP_RLE8 to defconfigs

[platform/kernel/u-boot.git] / include / configs / T208xQDS.h

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f485e4e..1735b17 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __T208xQDS_H
 #define __T208xQDS_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 #if defined(CONFIG_ARCH_T2080)
 #define CONFIG_FSL_SATA_V2
@@ -23,14 +26,8 @@
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_ENV_OVERWRITE
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
@@ -46,7 +43,7 @@
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 #endif
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
@@ -117,11 +114,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#if defined(CONFIG_SPIFLASH)
-#elif defined(CONFIG_SDCARD)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
@@ -288,7 +280,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0              CONFIG_SYS_NAND_AMASK
@@ -385,8 +377,8 @@ unsigned long get_board_ddr_clk(void);
 /*
  * I2C
  */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C3_SLAVE  0x7F
@@ -399,6 +391,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_I2C2_SPEED  100000
 #define CONFIG_SYS_FSL_I2C3_SPEED  100000
 #define CONFIG_SYS_FSL_I2C4_SPEED  100000
+#endif
+
+#define CONFIG_SYS_I2C_FSL
+
 #define I2C_MUX_PCA_ADDR_PRI   0x77 /* I2C bus multiplexer,primary */
 #define I2C_MUX_PCA_ADDR_SEC1  0x75 /* I2C bus multiplexer,secondary 1 */
 #define I2C_MUX_PCA_ADDR_SEC2  0x76 /* I2C bus multiplexer,secondary 2 */
@@ -568,7 +564,7 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 0x820)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_FMAN_FW_ADDR        (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
@@ -587,9 +583,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define RGMII_PHY1_ADDR        0x1
 #define RGMII_PHY2_ADDR        0x2
 #define FM1_10GEC1_PHY_ADDR      0x3
@@ -630,11 +623,9 @@ unsigned long get_board_ddr_clk(void);
  * SDHC
  */
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
 
 /*