/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
#ifndef __CONFIG_H
#define __CONFIG_H
+#include <linux/stringify.h>
+
/*
* T104x RDB board configuration file
*/
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_ENV_OVERWRITE
-
#if defined(CONFIG_SPIFLASH)
-#elif defined(CONFIG_SDCARD)
-#define CONFIG_SYS_MMC_ENV_DEV 0
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_NXP_ESBC
#define CONFIG_RAMBOOT_NAND
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 66666666
/*
* These can be toggled for performance analysis, otherwise use default.
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-
-#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00400000
-
/*
* Config the L3 Cache as L3 SRAM
*/
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
#endif
/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
-#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C3_SPEED 400000
-#define CONFIG_SYS_FSL_I2C4_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
-#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
/* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70
/* LDI/DVI Encoder for display */
#define CONFIG_SYS_I2C_LDI_ADDR 0x38
#define CONFIG_SYS_I2C_DVI_ADDR 0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM 0
/*
* RTC configuration
#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#endif
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#endif
-
#ifdef CONFIG_FMAN_ENET
#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB)
#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#define __USB_PHY_TYPE utmi
#define RAMDISKFILE "t104xrdb/ramdisk.uboot"
"fdtfile=" __stringify(FDTFILE) "\0" \
"bdev=sda3\0"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>