Convert CONFIG_PCIE1 et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / T104xRDB.h

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 562f7b3..8222c67 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -15,14 +15,6 @@
 #include <asm/config_mpc85xx.h>
 
 #ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_PAD_TO              0x40000
-#define CONFIG_SPL_MAX_SIZE            0x28000
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_SKIP_RELOCATE
-#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
 #define RESET_VECTOR_OFFSET            0x27FFC
 #define BOOT_PAGE_OFFSET               0x27000
 
@@ -44,14 +36,10 @@
 
 #ifdef CONFIG_SPIFLASH
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x30000FFC
-#define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x30000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x30000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (256 << 10)
-#ifndef CONFIG_SPL_BUILD
-#define        CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #ifdef CONFIG_SDCARD
@@ -60,9 +48,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x30000000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x30000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (260 << 10)
-#ifndef CONFIG_SPL_BUILD
-#define        CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #endif
@@ -70,27 +55,12 @@
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
-/* support deep sleep */
-#define CONFIG_DEEP_SLEEP
-
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_PCIE1                   /* PCIE controller 1 */
-#define CONFIG_PCIE2                   /* PCIE controller 2 */
-#define CONFIG_PCIE3                   /* PCIE controller 3 */
-#define CONFIG_PCIE4                   /* PCIE controller 4 */
-
-#if defined(CONFIG_SPIFLASH)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#ifdef CONFIG_NXP_ESBC
-#define CONFIG_RAMBOOT_NAND
-#define CONFIG_BOOTSCRIPT_COPY_RAM
-#endif
-#endif
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -101,8 +71,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -114,11 +82,7 @@
  */
 #define CONFIG_SYS_INIT_L3_VADDR       0xFFFC0000
 #define CONFIG_SYS_L3_SIZE             256 << 10
-#define CONFIG_SPL_GD_ADDR             (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024)
 #define SPL_ENV_ADDR                   (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR   (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE   (30 << 10)
-#define CONFIG_SPL_RELOC_STACK         (CONFIG_SPL_GD_ADDR + 64 * 1024)
 
 #define CONFIG_SYS_DCSRBAR             0xf0000000
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
@@ -130,9 +94,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
 
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
@@ -299,12 +260,6 @@
 #define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
 #endif
 
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
-#else
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
-#endif
-
 #if defined(CONFIG_RAMBOOT_PBL)
 #define CONFIG_SYS_RAMBOOT
 #endif
@@ -323,9 +278,7 @@
          CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
 #define CONFIG_SYS_INIT_RAM_SIZE               0x00004000
 
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
-                                       GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 #define CONFIG_SYS_MONITOR_LEN         (768 * 1024)
 
@@ -413,26 +366,9 @@
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 
-/* SATA */
-#define CONFIG_FSL_SATA_V2
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_SATA1
-#define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
-#define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
-
-#define CONFIG_LBA48
-#endif
-
 /*
 * USB
 */
-#define CONFIG_HAS_FSL_DR_USB
-
-#ifdef CONFIG_HAS_FSL_DR_USB
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#endif
-#endif
 
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR