Merge branch '2020-05-18-reduce-size-of-common.h'

[platform/kernel/u-boot.git] / include / configs / T1040QDS.h

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index d8b65e6..7ad018b 100644 (file)
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -1,5 +1,6 @@
 /*
  * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * T1040 QDS board configuration file
  */
@@ -59,24 +62,9 @@
 
 #ifdef CONFIG_MTD_NOR_FLASH
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
-#define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
-#define CONFIG_ENV_SECT_SIZE            0x10000
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_SYS_MMC_ENV_DEV          0
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_ENV_OFFSET              (512 * 1658)
-#elif defined(CONFIG_NAND)
-#define CONFIG_ENV_SIZE                        CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET              (7 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#else
-#define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE                0x2000
-#define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K (one sector) */
 #endif
-#else /* CONFIG_MTD_NOR_FLASH */
-#define CONFIG_ENV_SIZE                0x2000
-#define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K (one sector) */
 #endif
 
 #ifndef __ASSEMBLY__
@@ -105,9 +93,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP                64      /* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END         0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -264,7 +249,7 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0              CONFIG_SYS_NAND_AMASK
@@ -375,6 +360,8 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /* I2C */
+
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL             /* Use FSL common I2C driver */
 #define CONFIG_SYS_FSL_I2C_SPEED       50000   /* I2C speed in Hz */
@@ -389,6 +376,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_I2C2_OFFSET     0x118100
 #define CONFIG_SYS_FSL_I2C3_OFFSET     0x119000
 #define CONFIG_SYS_FSL_I2C4_OFFSET     0x119100
+#endif
+
+#define CONFIG_SYS_I2C_FSL             /* Use FSL common I2C driver */
 
 #define I2C_MUX_PCA_ADDR               0x77
 #define I2C_MUX_PCA_ADDR_PRI           0x77 /* Primary Mux*/
@@ -400,6 +390,7 @@ unsigned long get_board_ddr_clk(void);
 /* LDI/DVI Encoder for display */
 #define CONFIG_SYS_I2C_LDI_ADDR         0x38
 #define CONFIG_SYS_I2C_DVI_ADDR         0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM     0
 
 /*
  * RTC configuration
@@ -496,7 +487,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
@@ -545,7 +535,7 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 1680)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_FMAN_FW_ADDR        (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_FMAN_FW_ADDR                0xEFF00000
@@ -556,10 +546,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x10
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E