powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig

[platform/kernel/u-boot.git] / include / configs / T102xRDB.h

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 9bed457..c2bdef3 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -12,9 +12,6 @@
 #define __T1024RDB_H
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -28,13 +25,12 @@
 #define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_IFC                 /* Enable IFC Support */
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 
 /* support deep sleep */
-#ifdef CONFIG_PPC_T1024
+#ifdef CONFIG_ARCH_T1024
 #define CONFIG_DEEP_SLEEP
 #endif
 #if defined(CONFIG_DEEP_SLEEP)
@@ -45,7 +41,6 @@
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE           0x30001000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
@@ -509,7 +504,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FSL_DIU_FB
 #define CONFIG_SYS_DIU_ADDR    (CONFIG_SYS_CCSRBAR + 0x180000)
 #define CONFIG_CMD_BMP
-#define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
@@ -554,11 +548,10 @@ unsigned long get_board_ddr_clk(void);
  * General PCIe
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_PCI             /* Enable PCI/PCIE */
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 #define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE3           /* PCIE controller 3 */
-#ifdef CONFIG_PPC_T1040
+#ifdef CONFIG_ARCH_T1040
 #define CONFIG_PCIE4           /* PCIE controller 4 */
 #endif
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
@@ -650,7 +643,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
 #endif
 
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
@@ -669,7 +661,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * SDHC
  */
-#define CONFIG_MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
@@ -861,7 +852,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_BAUDRATE                115200
 #define __USB_PHY_TYPE         utmi
 
-#ifdef CONFIG_PPC_T1024
+#ifdef CONFIG_ARCH_T1024
 #define CONFIG_BOARDNAME t1024rdb
 #define BANK_INTLV cs0_cs1
 #else