/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
/*
#ifndef __T1024RDB_H
#define __T1024RDB_H
+#include <linux/stringify.h>
+
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_ENV_OVERWRITE
-
/* support deep sleep */
#ifdef CONFIG_ARCH_T1024
#define CONFIG_DEEP_SLEEP
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
#endif
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
#endif
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
#endif
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif /* CONFIG_RAMBOOT_PBL */
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#endif
-#if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_ENV_SECT_SIZE 0x10000
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_ENV_SECT_SIZE 0x40000
-#endif
-#elif defined(CONFIG_SDCARD)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (512 * 0x800)
-#elif defined(CONFIG_NAND)
-#define CONFIG_ENV_SIZE 0x2000
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#endif
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-#define CONFIG_ENV_ADDR 0xffe20000
-#define CONFIG_ENV_SIZE 0x2000
-#elif defined(CONFIG_ENV_IS_NOWHERE)
-#define CONFIG_ENV_SIZE 0x2000
-#else
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
-#endif
-
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
/*
* These can be toggled for performance analysis, otherwise use default.
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
-#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00400000
-
/*
* Config the L3 Cache as L3 SRAM
*/
#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000
#define CONFIG_SYS_L3_SIZE (256 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#endif
+#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* DDR Setup
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#endif
/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
-#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
#define I2C_PCA6408_BUS_NUM 1
#define I2C_PCA6408_ADDR 0x20
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
-#ifdef CONFIG_ARCH_T1040
-#define CONFIG_PCIE4 /* PCIE controller 4 */
-#endif
-#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_PCI_INDIRECT_BRIDGE
#ifdef CONFIG_PCI
/* controller 1, direct to uli, tgtid 3, Base address 20000 */
#ifdef CONFIG_PCIE1
#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
-#else
-#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
-#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000
-#endif
-#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */
#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000
-#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
-#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull
-#else
-#define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000
-#endif
-#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
#endif
/* controller 2, Slot 2, tgtid 2, Base address 201000 */
#ifdef CONFIG_PCIE2
#define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull
-#else
-#define CONFIG_SYS_PCIE2_MEM_BUS 0x90000000
-#define CONFIG_SYS_PCIE2_MEM_PHYS 0x90000000
-#endif
-#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */
#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000
-#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
-#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull
-#else
-#define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000
-#endif
-#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
#endif
/* controller 3, Slot 1, tgtid 1, Base address 202000 */
#ifdef CONFIG_PCIE3
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
-#else
-#define CONFIG_SYS_PCIE3_MEM_BUS 0xa0000000
-#define CONFIG_SYS_PCIE3_MEM_PHYS 0xa0000000
-#endif
-#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */
#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
-#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
-#else
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000
-#endif
-#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
-#endif
-
-/* controller 4, Base address 203000, to be removed */
-#ifdef CONFIG_PCIE4
-#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull
-#else
-#define CONFIG_SYS_PCIE4_MEM_BUS 0xb0000000
-#define CONFIG_SYS_PCIE4_MEM_PHYS 0xb0000000
-#endif
-#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000
-#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
-#else
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xf8030000
-#endif
-#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
#endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
#endif /* CONFIG_NOBQFMAN */
#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_REALTEK
#if defined(CONFIG_TARGET_T1024RDB)
#define RGMII_PHY1_ADDR 0x2
#define RGMII_PHY2_ADDR 0x6
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
-#define CONFIG_LOADADDR 1000000 /* default location for tftp, bootm */
#define __USB_PHY_TYPE utmi
#ifdef CONFIG_ARCH_T1024
"fdtaddr=1e00000\0" \
"bdev=sda3\0"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>