MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig
[platform/kernel/u-boot.git] / include / configs / T102xRDB.h
index 7c5fbbb..14f0ce6 100644 (file)
@@ -86,7 +86,7 @@
 #define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \
                (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR)
 /* Set 1M boot space for PCIe boot */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS      \
                (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
 #endif
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM      0
-
 /*
  * DDR Setup
  */
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 
 #ifdef CONFIG_TARGET_T1024RDB
 #define CONFIG_SYS_QMAN_SWP_ISDR_REG   0xE08
 
 #define CONFIG_SYS_DPAA_FMAN
-
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"                \
        "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"  \
        "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"             \
-       "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"     \
+       "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
        "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \
        "netdev=eth0\0"                                         \
        "tftpflash=tftpboot $loadaddr $uboot && "               \