global: Migrate CONFIG_MXC_UART_BASE to CFG
[platform/kernel/u-boot.git] / include / configs / T102xRDB.h
index b590f12..063b864 100644 (file)
@@ -94,9 +94,6 @@
  * These can be toggled for performance analysis, otherwise use default.
  */
 #define CFG_SYS_INIT_L2CSR0            L2CSR0_L2E
-#ifdef CONFIG_DDR_ECC
-#define CONFIG_MEM_INIT_VALUE          0xdeadbeef
-#endif
 
 /*
  *  Config the L3 Cache as L3 SRAM
 /*
  * DDR Setup
  */
-#define CONFIG_VERY_BIG_RAM
 #define CFG_SYS_DDR_SDRAM_BASE 0x00000000
 #define CFG_SYS_SDRAM_BASE             CFG_SYS_DDR_SDRAM_BASE
 #if defined(CONFIG_TARGET_T1024RDB)
 #endif
 
 /* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
 #define CFG_SYS_INIT_RAM_ADDR  0xfdd00000      /* Initial L1 address */
 #ifdef CONFIG_PHYS_64BIT
 #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH        0xf
 /*
  * Environment Configuration
  */
-#define CONFIG_ROOTPATH                "/opt/nfsroot"
-#define CONFIG_UBOOTPATH       u-boot.bin /* U-Boot image on TFTP server */
 #define __USB_PHY_TYPE         utmi
 
 #ifdef CONFIG_ARCH_T1024
        "fdtfile=t1023rdb/t1023rdb.dtb\0"
 #endif
 
-#define        CONFIG_EXTRA_ENV_SETTINGS                               \
+#define        CFG_EXTRA_ENV_SETTINGS                          \
        ARCH_EXTRA_ENV_SETTINGS                                 \
        "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"                \
        "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"  \
-       "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"             \
+       "uboot=" CONFIG_UBOOTPATH "\0"          \
        "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
        "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \
        "netdev=eth0\0"                                         \