Merge branch 'next' of git://git.denx.de/u-boot-avr32
[platform/kernel/u-boot.git] / include / configs / Sandpoint8240.h
index 5bf184e..cfd16d3 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "netdev=eth0\0"                                                 \
        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
-               "nfsroot=$(serverip):$(rootpath)\0"                     \
+               "nfsroot=${serverip}:${rootpath}\0"                     \
        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
-       "addip=setenv bootargs $(bootargs) "                            \
-               "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
-               ":$(hostname):$(netdev):off panic=1\0"                  \
-       "net_self=tftp $(kernel_addr) $(bootfile);"                     \
-               "tftp $(ramdisk_addr) $(ramdisk);"                      \
+       "addip=setenv bootargs ${bootargs} "                            \
+               "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
+               ":${hostname}:${netdev}:off panic=1\0"                  \
+       "net_self=tftp ${kernel_addr} ${bootfile};"                     \
+               "tftp ${ramdisk_addr} ${ramdisk};"                      \
                "run ramargs addip;"                                    \
-               "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
-       "net_nfs=tftp $(kernel_addr) $(bootfile);"                      \
+               "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
+       "net_nfs=tftp ${kernel_addr} ${bootfile};"                      \
                "run nfsargs addip;bootm\0"                             \
        "rootpath=/opt/eldk/ppc_82xx\0"                                 \
        "bootfile=/tftpboot/SP8240/uImage\0"                            \
        ""
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
-#define CONFIG_COMMANDS                ( (CONFIG_CMD_DFL & ~CFG_CMD_AUTOSCRIPT) | \
-                                 CFG_CMD_ELF    | \
-                                 CFG_CMD_I2C    | \
-                                 CFG_CMD_SDRAM  | \
-                                 CFG_CMD_EEPROM | \
-                                 CFG_CMD_PCI )
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any)      */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
 
 #define CONFIG_DRAM_SPEED      100             /* MHz                          */
 
  */
 
 
-#define CFG_WINBOND_83C553     1       /*has a winbond bridge                  */
+#define CONFIG_WINBOND_83C553  1       /*has a winbond bridge                  */
 #define CFG_USE_WINBOND_IDE    0       /*use winbond 83c553 internal IDE ctrlr */
 #define CFG_WINBOND_ISA_CFG_ADDR    0x80005800 /*pci-isa bridge config addr    */
 #define CFG_WINBOND_IDE_CFG_ADDR    0x80005900 /*ide config addr               */
 /*
  * NS87308 Configuration
  */
-#define CFG_NS87308                    /* Nat Semi super-io controller on ISA bus */
+#define CONFIG_NS87308                 /* Nat Semi super-io controller on ISA bus */
 
 #define CFG_NS87308_BADDR_10   1
 
  */
 
 #define CONFIG_SYS_CLK_FREQ  33000000  /* external frequency to pll */
-#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  2
+#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  1
 
 #define CFG_ROMNAL             7       /*rom/flash next access time            */
 #define CFG_ROMFAL             11      /*rom/flash access time                 */
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE     32      /* For MPC8240 CPU                      */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #  define CFG_CACHELINE_SHIFT  5       /* log base 2 of the above value */
 #endif