Add GPL-2.0+ SPDX-License-Identifier to source files

[platform/kernel/u-boot.git] / include / configs / Sandpoint8240.h

diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h
index e2d45b1..c5e0339 100644 (file)
--- a/include/configs/Sandpoint8240.h
+++ b/include/configs/Sandpoint8240.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2001-2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /* ------------------------------------------------------------------------- */
@@ -40,6 +24,7 @@
 #define CONFIG_SANDPOINT       1
 
 #define        CONFIG_SYS_TEXT_BASE    0xFFF00000
+#define CONFIG_SYS_LDSCRIPT    "board/sandpoint/u-boot.lds"
 
 #if 0
 #define USE_DINK32             1
@@ -126,9 +111,9 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_PCI                             /* include pci support          */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #undef CONFIG_PCI_PNP
 
-#define CONFIG_NET_MULTI                       /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100
 #define CONFIG_SYS_RX_ETH_BUFFER       8               /* use 8 rx buffer on eepro100  */
@@ -155,20 +140,17 @@
 #define CONFIG_SYS_RAMBOOT             1
 #define CONFIG_SYS_INIT_RAM_ADDR       (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 #define CONFIG_SYS_INIT_RAM_SIZE       0x10000
-#define CONFIG_SYS_GBL_DATA_SIZE       256  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 #else
 #undef CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_MONITOR_LEN         0x00030000
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 
-/*#define CONFIG_SYS_GBL_DATA_SIZE    256*/
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 
 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE      0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 #endif
 
@@ -229,7 +211,6 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10      /* takes up to 10 msec          */
 
 
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 #define CONFIG_SYS_FLASH_BANKS         { FLASH_BASE0_PRELIM , FLASH_BASE1_PRELIM }
 
 /*-----------------------------------------------------------------------
@@ -237,7 +218,7 @@
  */
 
 
-#define CONFIG_WINBOND_83C553  1       /*has a winbond bridge                  */
+/* #define CONFIG_WINBOND_83C553       1       / *has a winbond bridge                 */
 #define CONFIG_SYS_USE_WINBOND_IDE     0       /*use winbond 83c553 internal IDE ctrlr */
 #define CONFIG_SYS_WINBOND_ISA_CFG_ADDR    0x80005800  /*pci-isa bridge config addr    */
 #define CONFIG_SYS_WINBOND_IDE_CFG_ADDR    0x80005900  /*ide config addr               */