Merge branch 'next' of ../next
[platform/kernel/u-boot.git] / include / configs / SIMPC8313.h
index e20527e..36e952e 100644 (file)
 #define CONFIG_NAND_U_BOOT
 
 #define CONFIG_E300                    1
-#define CONFIG_MPC83XX                 1
-#define CONFIG_MPC831X                 1
+#define CONFIG_MPC83xx                 1
+#define CONFIG_MPC831x                 1
 #define CONFIG_MPC8313                 1
 
 #define CONFIG_PCI
-#define CONFIG_83XX_GENERIC_PCI
 
 #define CONFIG_MISC_INIT_R
 
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR                (LCRR_DBYP | LCRR_EADC_1 | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
+#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_1
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR    (0x00040000 /* TODO */ \
                                | (0xFF << LBCR_BMT_SHIFT) \
                                | 0xF ) /* 0x0004ff0f */
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00100000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00100100
 #define CONFIG_SYS_NAND_U_BOOT_RELOC   0x00010000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
 
 #define CONFIG_SYS_NAND_BR_PRELIM      ( CONFIG_SYS_NAND_BASE \
                                        | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
 
 /* mtdparts command line support */
 #define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE              /* needed for mtdparts commands */
 #define MTDIDS_DEFAULT         "nand0=nand0"
 #define MTDPARTS_DEFAULT       "mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)"
 
 #define CONFIG_HARD_I2C                        /* I2C with hardware support*/
 #define CONFIG_FSL_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 #define CONFIG_SYS_I2C_NOPROBES                {{0,0x69}} /* Don't probe these addrs */
 #define CONFIG_SYS_IBAT5U      (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L      (0xF0000000 | BATL_PP_10)
+#define CONFIG_SYS_IBAT6L      (0xF0000000 | BATL_PP_10 | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U      (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 
 #define CONFIG_SYS_IBAT7L      (0)