rename CFG_ENV macros to CONFIG_ENV

[platform/kernel/u-boot.git] / include / configs / Rattler.h

diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h
index 5bdf571..6ec52e6 100644 (file)
--- a/include/configs/Rattler.h
+++ b/include/configs/Rattler.h
@@ -37,8 +37,6 @@
 
 #define CONFIG_RATTLER                 /* Analogue&Micro Rattler board */
 
-#undef DEBUG
-
 /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
 #define CONFIG_ENV_OVERWRITE
 
@@ -127,6 +125,15 @@
 
 
 /*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
@@ -180,7 +187,7 @@
 
 #define CFG_FLASH_BASE         0xFE000000
 #define CFG_FLASH_CFI
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
 #define CFG_MAX_FLASH_BANKS    1       /* max num of flash banks       */
 #define CFG_MAX_FLASH_SECT     256     /* max num of sects on one chip */
 
@@ -207,7 +214,7 @@
 #define MTDIDS_DEFAULT         "nor0=rattler-0"
 #define MTDPARTS_DEFAULT       "mtdparts=rattler-0:-@1m(jffs2)"
 */
-#endif /* CFG_CMD_JFFS2 */
+#endif /* CONFIG_CMD_JFFS2 */
 
 #define CFG_MONITOR_BASE       TEXT_BASE
 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
@@ -216,12 +223,12 @@
 
 #define CFG_MONITOR_LEN                (256 << 10)     /* Reserve 256 kB for Monitor   */
 
-#define CFG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_IS_IN_FLASH
 
-#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE      0x10000
-#define CFG_ENV_ADDR           (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-#endif /* CFG_ENV_IS_IN_FLASH */
+#ifdef CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE   0x10000
+#define CONFIG_ENV_ADDR                (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#endif /* CONFIG_ENV_IS_IN_FLASH */
 
 #define CFG_DEFAULT_IMMR       0xFF010000
 
@@ -243,13 +250,13 @@
 /* Hard reset configuration word */
 #define CFG_HRCW_MASTER                0x0A06875A /* Not used - provided by FPGA */
 /* No slaves */
-#define CFG_HRCW_SLAVE1        0
-#define CFG_HRCW_SLAVE2        0
-#define CFG_HRCW_SLAVE3        0
-#define CFG_HRCW_SLAVE4        0
-#define CFG_HRCW_SLAVE5        0
-#define CFG_HRCW_SLAVE6        0
-#define CFG_HRCW_SLAVE7        0
+#define CFG_HRCW_SLAVE1                0
+#define CFG_HRCW_SLAVE2                0
+#define CFG_HRCW_SLAVE3                0
+#define CFG_HRCW_SLAVE4                0
+#define CFG_HRCW_SLAVE5                0
+#define CFG_HRCW_SLAVE6                0
+#define CFG_HRCW_SLAVE7                0
 
 #define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM          0x02    /* Software reboot                  */