Fix merge problems

[platform/kernel/u-boot.git] / include / configs / PMC440.h

diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 3d2ed1e..42f1d8d 100644 (file)
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -41,7 +41,9 @@
 
 #define CONFIG_SYS_CLK_FREQ    33333400
 
+#if 0 /* temporary disabled because OS/9 does not like dcache on startup */
 #define CONFIG_4xx_DCACHE              /* enable dcache        */
+#endif
 
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* Call board_early_init_f */
 #define CONFIG_MISC_INIT_R     1       /* Call misc_init_r     */
@@ -167,6 +169,7 @@
  * set up. While still running from cache, I experienced problems accessing
  * the NAND controller.        sr - 2006-08-25
  */
+#if defined (CONFIG_NAND_U_BOOT)
 #define CFG_NAND_BOOT_SPL_SRC  0xfffff000      /* SPL location                 */
 #define CFG_NAND_BOOT_SPL_SIZE (4 << 10)       /* SPL size                     */
 #define CFG_NAND_BOOT_SPL_DST  (CFG_OCM_BASE + (12 << 10)) /* Copy SPL here    */
@@ -195,6 +198,7 @@
 #define CFG_NAND_OOBSIZE       16
 #define CFG_NAND_ECCTOTAL      (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
 #define CFG_NAND_ECCPOS                {0, 1, 2, 3, 6, 7}
+#endif
 
 #ifdef CFG_ENV_IS_IN_NAND
 /*
@@ -270,6 +274,7 @@
        CFG_BOOTFILE                                                    \
        CFG_ROOTPATH                                                    \
        "netdev=eth0\0"                                                 \
+       "ethrotate=no\0"                                                \
        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
        "nfsroot=${serverip}:${rootpath}\0"                             \
        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
@@ -352,10 +357,6 @@
 #define CONFIG_CMD_SDRAM
 
 /* POST support */
-/* ethernet POST sometimes freezes the CPU.
- * So disable it for now until issue is solved
- */
-#if 0
 #define CONFIG_POST            (CFG_POST_MEMORY |      \
                                 CFG_POST_CPU    |      \
                                 CFG_POST_UART   |      \
@@ -364,15 +365,6 @@
                                 CFG_POST_FPU    |      \
                                 CFG_POST_ETHER  |      \
                                 CFG_POST_SPR)
-#else
-#define CONFIG_POST            (CFG_POST_MEMORY |      \
-                                CFG_POST_CPU    |      \
-                                CFG_POST_UART   |      \
-                                CFG_POST_I2C    |      \
-                                CFG_POST_CACHE  |      \
-                                CFG_POST_FPU    |      \
-                                CFG_POST_SPR)
-#endif
 
 #define CFG_POST_WORD_ADDR     (CFG_GBL_DATA_OFFSET - 0x4)
 
@@ -393,7 +385,7 @@
  *----------------------------------------------------------------------*/
 #define CFG_LONGHELP                   /* undef to save memory         */
 #define CFG_PROMPT             "=> "   /* Monitor Command Prompt       */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE             1024    /* Console I/O Buffer Size      */
 #else
 #define CFG_CBSIZE             256     /* Console I/O Buffer Size      */
@@ -417,7 +409,8 @@
 #define CONFIG_VERSION_VARIABLE 1      /* include version env variable */
 
 #define CONFIG_AUTOBOOT_KEYED  1
-#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
+#define CONFIG_AUTOBOOT_PROMPT \
+       "Press SPACE to abort autoboot in %d seconds\n", bootdelay
 #undef CONFIG_AUTOBOOT_DELAY_STR
 #define CONFIG_AUTOBOOT_STOP_STR " "
 
@@ -501,6 +494,7 @@
 #define NAND_MAX_CHIPS         1
 #define CFG_NAND_BASE          (CFG_NAND_ADDR + CFG_NAND_CS)
 #define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
+#define CFG_NAND_QUIET_TEST    1
 
 /*
  * Internal Definitions
@@ -510,7 +504,7 @@
 #define BOOTFLAG_COLD  0x01    /* Normal Power-On: Boot from FLASH     */
 #define BOOTFLAG_WARM  0x02    /* Software reboot                      */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif