pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option

[platform/kernel/u-boot.git] / include / configs / PMC440.h

diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 3c19f52..40c1827 100644 (file)
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -39,6 +39,10 @@
 #define CONFIG_440             1       /* ... PPC440 family    */
 #define CONFIG_4xx             1       /* ... PPC4xx family    */
 
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFFF90000
+#endif
+
 #define CONFIG_SYS_CLK_FREQ    33333400
 
 #if 0 /* temporary disabled because OS/9 does not like dcache on startup */
@@ -53,7 +57,7 @@
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN         (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_LEN         (~(CONFIG_SYS_TEXT_BASE) + 1)
 #define CONFIG_SYS_MALLOC_LEN          (1024 * 1024)   /* Reserve 256 kB for malloc()  */
 
 #define CONFIG_PRAM            0       /* use pram variable to overwrite */
@@ -61,7 +65,7 @@
 #define CONFIG_SYS_BOOT_BASE_ADDR      0xf0000000
 #define CONFIG_SYS_SDRAM_BASE          0x00000000      /* _must_ be 0          */
 #define CONFIG_SYS_FLASH_BASE          0xfc000000      /* start of FLASH       */
-#define CONFIG_SYS_MONITOR_BASE                TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_ADDR           0xd0000000      /* NAND Flash           */
 #define CONFIG_SYS_OCM_BASE            0xe0010000      /* ocm                  */
 #define CONFIG_SYS_OCM_DATA_ADDR       CONFIG_SYS_OCM_BASE
@@ -72,9 +76,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 #define CONFIG_SYS_PCI_MEMSIZE         0x80000000      /* 2GB! */
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE     0xef600000      /* internal peripherals */
-
 #define CONFIG_SYS_USB2D0_BASE         0xe0000100
 #define CONFIG_SYS_USB_DEVICE          0xe0000000
 #define CONFIG_SYS_USB_HOST            0xe0000400
@@ -87,18 +88,20 @@
  *----------------------------------------------------------------------*/
 /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache    */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_BASE     /* OCM                  */
-#define CONFIG_SYS_INIT_RAM_END        (4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE       256     /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE       (4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_SERIAL_MULTI    1
-#undef CONFIG_UART1_CONSOLE    /* console on front panel */
 
 #define CONFIG_SYS_BAUDRATE_TABLE                                              \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
@@ -196,9 +199,7 @@
 
 #define CONFIG_SYS_NAND_ECCSIZE        256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 #define CONFIG_SYS_NAND_OOBSIZE        16
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
 #define CONFIG_SYS_NAND_ECCPOS         {0, 1, 2, 3, 6, 7}
 #endif
 
@@ -320,7 +321,6 @@
 #define CONFIG_HAS_ETH0
 #define CONFIG_SYS_RX_ETH_BUFFER       32      /* Number of ethernet rx buffers & descriptors */
 
-#define CONFIG_NET_MULTI       1
 #define CONFIG_HAS_ETH1                1       /* add support for "eth1addr"   */
 #define CONFIG_PHY1_ADDR       1
 #define CONFIG_RESET_PHY_R     1
@@ -373,7 +373,6 @@
                                 CONFIG_SYS_POST_ETHER  |       \
                                 CONFIG_SYS_POST_SPR)
 
-#define CONFIG_SYS_POST_WORD_ADDR      (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 #define CONFIG_LOGBUFFER
 #define CONFIG_SYS_POST_CACHE_ADDR     0x7fff0000      /* free virtual address     */
 
@@ -420,6 +419,7 @@
  *----------------------------------------------------------------------*/
 /* General PCI */
 #define CONFIG_PCI             /* include pci support          */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_PCI_PNP         /* do (not) pci plug-and-play   */
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0       /* to avoid problems with PNP   */
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup  */
@@ -430,6 +430,8 @@
 #define CONFIG_SYS_PCI_MASTER_INIT
 #define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
 
+#define CONFIG_PCI_BOOTDELAY 0
+
 /* PCI identification */
 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH 0x0441     /* PCI Device ID: Non-Monarch */
@@ -503,14 +505,6 @@
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1 /* nand driver supports mutipl. chips */
 #define CONFIG_SYS_NAND_QUIET_TEST     1
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01    /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02    /* Software reboot                      */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */