#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_I2C_CMD_TREE 1
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#endif
/* Memory Bank 1 (RESET) initialization */
-#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200
+#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000)
/* Memory Bank 4 (FPGA / 32Bit) initialization */
* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
#define CONFIG_SYS_NAND_QUIET_TEST 1