*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CONFIG_DDR_SPD
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_ECC /* only for ECC DDR module */
+#define CONFIG_FSL_DMA /* use DMA to init DDR ECC */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_CMD_MII
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
#endif
#if defined(CONFIG_SYS_RAMBOOT)
- #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_SAVEENV
#undef CONFIG_CMD_LOADS
#endif