Re-factoring the legacy NAND code (legacy NAND now only in board-specific

[platform/kernel/u-boot.git] / include / configs / PIP405.h

diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 9ac5715..091b768 100644 (file)
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -69,6 +69,8 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS  (if any) */
 #include <cmd_confdefs.h>
 
+#define CFG_NAND_LEGACY
+
 #define         CFG_HUSH_PARSER
 #define         CFG_PROMPT_HUSH_PS2 "> "
 /**************************************************************
@@ -224,7 +226,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                8192    /* For IBM 405 CPUs                     */
+#define CFG_DCACHE_SIZE                8192    /* For AMCC 405 CPUs                    */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */