configs: Finish migration of PHY_GIGE

[platform/kernel/u-boot.git] / include / configs / P2041RDB.h

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index d3b655f..ef7563d 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -63,7 +63,6 @@
 
 #if defined(CONFIG_SPIFLASH)
        #define CONFIG_SYS_EXTRA_ENV_RELOC
-       #define CONFIG_ENV_IS_IN_SPI_FLASH
        #define CONFIG_ENV_SPI_BUS              0
        #define CONFIG_ENV_SPI_CS               0
        #define CONFIG_ENV_SPI_MAX_HZ           10000000
@@ -82,13 +81,11 @@
 #define CONFIG_ENV_SIZE                        CONFIG_SYS_NAND_BLOCK_SIZE
 #define CONFIG_ENV_OFFSET              (7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-#define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR                0xffe20000
 #define CONFIG_ENV_SIZE                0x2000
 #elif defined(CONFIG_ENV_IS_NOWHERE)
 #define CONFIG_ENV_SIZE                0x2000
 #else
-       #define CONFIG_ENV_IS_IN_FLASH
        #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE \
                        - CONFIG_ENV_SECT_SIZE)
        #define CONFIG_ENV_SIZE         0x2000
@@ -230,7 +227,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BLOCK_SIZE    (128 * 1024)
 
 /* NAND flash config */
@@ -562,7 +558,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*