Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig

[platform/kernel/u-boot.git] / include / configs / P2041RDB.h

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index e6057f9..ac579b6 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -11,10 +11,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_P2041RDB
-#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_PPC_P2041
-
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS    0xfffffffc
@@ -32,9 +28,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 
@@ -47,10 +40,9 @@
 #endif
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
-#define CONFIG_PCI                     /* Enable PCI/PCIE */
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_PCIE2                   /* PCIE controller 2 */
 #define CONFIG_PCIE3                   /* PCIE controller 3 */
@@ -63,8 +55,6 @@
 #define CONFIG_SRIO_PCIE_BOOT_MASTER
 #define CONFIG_SYS_DPAA_RMAN           /* RMan */
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
-
 #define CONFIG_ENV_OVERWRITE
 
 #ifdef CONFIG_SYS_NO_FLASH
@@ -175,7 +165,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x52
@@ -287,7 +276,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 
-#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R      /* call board_early_init_r function */
 #define CONFIG_MISC_INIT_R
 
@@ -543,7 +531,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #define CONFIG_DOS_PARTITION
@@ -612,14 +599,11 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_HAS_FSL_MPH_USB
 
 #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
-#define CONFIG_USB_STORAGE
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
-#define CONFIG_MMC
-
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR