pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option

[platform/kernel/u-boot.git] / include / configs / P2020DS.h

diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 5fc9563..229117c 100644 (file)
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -73,6 +73,7 @@
 #define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
 #define CONFIG_PCIE3           1       /* PCIE controler 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 
@@ -236,7 +237,8 @@
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 #endif
 
-#define CONFIG_FLASH_BR_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
+#define CONFIG_FLASH_BR_PRELIM  \
+       (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
 
 #define CONFIG_SYS_BR1_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
@@ -338,20 +340,20 @@
 #define CONFIG_SYS_BR2_PRELIM  CONFIG_SYS_NAND_BR_PRELIM  /* NAND Base Address */
 #define CONFIG_SYS_OR2_PRELIM  CONFIG_SYS_NAND_OR_PRELIM  /* NAND Options */
 
-#define CONFIG_SYS_BR4_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_NAND_BASE_PHYS + 0x40000))\
+#define CONFIG_SYS_BR4_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8               /* Port Size = 8bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V)                 /* valid */
 #define CONFIG_SYS_OR4_PRELIM  CONFIG_SYS_NAND_OR_PRELIM       /* NAND Options */
-#define CONFIG_SYS_BR5_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_NAND_BASE_PHYS + 0x80000))\
+#define CONFIG_SYS_BR5_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x80000) \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8               /* Port Size = 8bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V)                 /* valid */
 #define CONFIG_SYS_OR5_PRELIM  CONFIG_SYS_NAND_OR_PRELIM       /* NAND Options */
 
-#define CONFIG_SYS_BR6_PRELIM  (BR_PHYS_ADDR((CONFIG_SYS_NAND_BASE_PHYS + 0xc0000))\
+#define CONFIG_SYS_BR6_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0xc0000) \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8               /* Port Size = 8bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
@@ -489,7 +491,7 @@
 #define VIDEO_IO_OFFSET                CONFIG_SYS_PCIE1_IO_VIRT
 
 /* video */
-#define CONFIG_VIDEO
+#undef CONFIG_VIDEO
 
 #if defined(CONFIG_VIDEO)
 #define CONFIG_BIOSEMU
@@ -717,30 +719,30 @@
 #define CONFIG_BAUDRATE        115200
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
- "perf_mode=performance\0"                     \
+"perf_mode=performance\0"                      \
        "hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1;"  \
        "usb1:dr_mode=host,phy_type=ulpi\0"                     \
- "netdev=eth0\0"                                               \
- "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"                                \
- "tftpflash=tftpboot $loadaddr $uboot; "                       \
-       "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "     \
-       "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "           \
-       "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; "   \
-       "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "              \
-       "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0"  \
- "satabootcmd=setenv bootargs root=/dev/$bdev rw "     \
+"netdev=eth0\0"                                                \
+"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"                    \
+"tftpflash=tftpboot $loadaddr $uboot; "                        \
+       "protect off " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+       "erase " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; "      \
+       "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+       "protect on " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+       "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
+"satabootcmd=setenv bootargs root=/dev/$bdev rw "      \
        "console=$consoledev,$baudrate $othbootargs;"   \
        "tftp $loadaddr $bootfile;"                     \
        "tftp $fdtaddr $fdtfile;"                       \
        "bootm $loadaddr - $fdtaddr"                    \
- "consoledev=ttyS0\0"                          \
- "ramdiskaddr=2000000\0"                       \
- "ramdiskfile=p2020ds/ramdisk.uboot\0"         \
- "fdtaddr=c00000\0"                            \
- "othbootargs=cache-sram-size=0x10000\0"       \
- "fdtfile=p2020ds/p2020ds.dtb\0"               \
- "bdev=sda3\0"                                 \
- "partition=scsi 0:0\0"
+"consoledev=ttyS0\0"                           \
+"ramdiskaddr=2000000\0"                        \
+"ramdiskfile=p2020ds/ramdisk.uboot\0"          \
+"fdtaddr=c00000\0"                             \
+"othbootargs=cache-sram-size=0x10000\0"        \
+"fdtfile=p2020ds/p2020ds.dtb\0"                \
+"bdev=sda3\0"                                  \
+"partition=scsi 0:0\0"
 
 #define CONFIG_HDBOOT                          \
  "setenv bootargs root=/dev/$bdev rw "         \