#endif
/* High Level Configuration Options */
-#define CONFIG_MP /* support multiple processors */
#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
| BR_PS_16 | BR_V)
#define CONFIG_FLASH_OR_PRELIM 0xfc000ff7
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x2
#define CONFIG_SYS_TBIPA_VALUE 8
-#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
#endif