configs: Migrate CMD_NAND*

[platform/kernel/u-boot.git] / include / configs / P1023RDB.h

diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 1ae1471..75d1efd 100644 (file)
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -23,13 +23,8 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE           /* BOOKE */
-#define CONFIG_E500            /* BOOKE e500 family */
-#define CONFIG_P1023
 #define CONFIG_MP              /* support multiple processors */
 
-#define CONFIG_FSL_ELBC                /* Has Enhanced localbus controller */
-#define CONFIG_PCI             /* Enable PCI/PCIE */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_PCIE1           /* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2           /* PCIE controller 2 (slot 2) */
@@ -37,7 +32,6 @@
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
-#define CONFIG_FSL_LAW         /* Use common FSL init code */
 
 #ifndef __ASSEMBLY__
 extern unsigned long get_clock_freq(void);
@@ -73,7 +67,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE          512u    /* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0
@@ -115,7 +108,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 
-#define CONFIG_BOARD_EARLY_INIT_F      /* call board_early_init_f function */
 #define CONFIG_BOARD_EARLY_INIT_R      /* call board_early_init_r function */
 
 #define CONFIG_SYS_INIT_RAM_LOCK
@@ -133,7 +125,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_CMD_NAND
 #define CONFIG_NAND_FSL_ELBC
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
@@ -230,7 +221,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
 
 #if defined(CONFIG_PCI)
-#define CONFIG_PCI_PNP         /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 
@@ -239,7 +229,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K (one sector) */
@@ -250,7 +239,6 @@ extern unsigned long get_clock_freq(void);
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_IRQ
 #define CONFIG_CMD_REGINFO
 
 #if defined(CONFIG_PCI)
@@ -262,12 +250,9 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_HAS_FSL_DR_USB
 #ifdef CONFIG_HAS_FSL_DR_USB
-#define CONFIG_USB_EHCI
-
-#ifdef CONFIG_USB_EHCI
+#ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_FSL
-#define CONFIG_DOS_PARTITION
 #endif
 #endif
 
@@ -305,9 +290,6 @@ extern unsigned long get_clock_freq(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-
-#define CONFIG_BAUDRATE        115200
-
 /* Qman/Bman */
 #define CONFIG_SYS_DPAA_QBMAN          /* support Q/Bman */
 #define CONFIG_SYS_QMAN_MEM_BASE       0xff000000