powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig

[platform/kernel/u-boot.git] / include / configs / P1022DS.h

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index bdbf119..4b2eb65 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -13,7 +13,6 @@
 #ifdef CONFIG_SDCARD
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SPL_TEXT_BASE           0xf8f81000
 #define CONFIG_SPL_PAD_TO              0x20000
 #define CONFIG_SPL_MAX_SIZE            (128 * 1024)
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
@@ -21,8 +20,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT            "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_MMC_BOOT
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_COMMON_INIT_DDR
 #endif
@@ -32,7 +29,6 @@
 #define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SPL_TEXT_BASE           0xf8f81000
 #define CONFIG_SPL_PAD_TO              0x20000
 #define CONFIG_SPL_MAX_SIZE            (128 * 1024)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
@@ -40,8 +36,6 @@
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_SPI_BOOT
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_COMMON_INIT_DDR
 #endif
@@ -53,7 +47,6 @@
 
 #ifdef CONFIG_NAND
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
@@ -67,7 +60,6 @@
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
-#define CONFIG_SPL_TEXT_BASE           0xff800000
 #define CONFIG_SPL_MAX_SIZE            4096
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xf8f80000
@@ -77,7 +69,6 @@
 #define CONFIG_SPL_PAD_TO              0x20000
 #define CONFIG_TPL_PAD_TO              0x20000
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #endif
 
 /* High Level Configuration Options */
@@ -90,7 +81,6 @@
 #define CONFIG_PCIE2                   /* PCIE controller 2 (slot 2) */
 #define CONFIG_PCIE3                   /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
-#define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
 #define CONFIG_ENABLE_36BIT_PHYS