powerpc: Remove configs/MPC8536DS_36BIT_defconfig board

[platform/kernel/u-boot.git] / include / configs / P1022DS.h

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 695fdd5..2b76107 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_SDCARD
@@ -20,7 +22,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT            "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_COMMON_INIT_DDR
 #endif
@@ -37,7 +38,6 @@
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_COMMON_INIT_DDR
 #endif
@@ -47,7 +47,7 @@
 #define CONFIG_SYS_NAND_MAX_ECCPOS     56
 #define CONFIG_SYS_NAND_MAX_OOBFREE    5
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_NAND_INIT
@@ -71,7 +71,6 @@
 #define CONFIG_SPL_PAD_TO              0x20000
 #define CONFIG_TPL_PAD_TO              0x20000
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #endif
 
 /* High Level Configuration Options */
@@ -84,7 +83,6 @@
 #define CONFIG_PCIE2                   /* PCIE controller 2 (slot 2) */
 #define CONFIG_PCIE3                   /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
-#define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -104,9 +102,6 @@
 #define CONFIG_L2_CACHE
 #define CONFIG_BTB
 
-#define CONFIG_SYS_MEMTEST_START       0x00000000
-#define CONFIG_SYS_MEMTEST_END         0x7fffffff
-
 #define CONFIG_SYS_CCSRBAR             0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
@@ -191,7 +186,7 @@
        (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
 #define CONFIG_FLASH_OR_PRELIM (OR_AM_128MB | 0xff7)
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_BR1_PRELIM  CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 #define CONFIG_SYS_OR1_PRELIM  CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 #else
@@ -246,7 +241,7 @@
                               | OR_FCM_SCY_1 \
                               | OR_FCM_TRLX \
                               | OR_FCM_EHTR)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_BR0_PRELIM  CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
 #define CONFIG_SYS_OR0_PRELIM  CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 #else
@@ -302,7 +297,7 @@
 #define CONFIG_SPL_RELOC_MALLOC_ADDR   (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
 #define CONFIG_SPL_RELOC_MALLOC_SIZE   (108 << 10)
 #define CONFIG_SPL_GD_ADDR             (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SYS_INIT_L2_ADDR                0xf8f80000
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS   CONFIG_SYS_INIT_L2_ADDR
@@ -363,8 +358,8 @@
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
@@ -372,6 +367,8 @@
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
 #define CONFIG_SYS_I2C_NOPROBES                {{0, 0x29}}
+#endif
+#define CONFIG_SYS_I2C_FSL
 
 /*
  * I2C2 EEPROM
@@ -496,30 +493,15 @@
 /*
  * Environment
  */
-#ifdef CONFIG_SPIFLASH
-#define CONFIG_ENV_SIZE                0x2000  /* 8KB */
-#define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
-#define CONFIG_ENV_SECT_SIZE   0x10000
-#elif defined(CONFIG_SDCARD)
+#if defined(CONFIG_SDCARD)
 #define CONFIG_FSL_FIXED_MMC_LOCATION
-#define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_ENV_SIZE                0x2000
-#define CONFIG_ENV_ADDR                (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
-#else
-#define CONFIG_ENV_SIZE                CONFIG_SYS_NAND_BLOCK_SIZE
+#define SPL_ENV_ADDR           (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
 #endif
-#define CONFIG_ENV_OFFSET      (1024 * 1024)
-#define CONFIG_ENV_RANGE       (3 * CONFIG_ENV_SIZE)
 #elif defined(CONFIG_SYS_RAMBOOT)
-#define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - 0x1000)
-#define CONFIG_ENV_SIZE                0x2000
-#else
-#define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE                0x2000
-#define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K (one sector) */
+#define SPL_ENV_ADDR           (CONFIG_SYS_MONITOR_BASE - 0x1000)
 #endif
 
 #define CONFIG_LOADS_ECHO