Merge tag 'dm-pull-18mar22' of https://source.denx.de/u-boot/custodians/u-boot-dm...

[platform/kernel/u-boot.git] / include / configs / P1010RDB.h

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 6a9c86c..4dabfdf 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -151,7 +151,6 @@
  * These can be toggled for performance analysis, otherwise use default.
  */
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
-#define CONFIG_BTB                     /* toggle branch predition */
 
 
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -171,7 +170,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 /* DDR3 Controller Settings */
 #define CONFIG_SYS_DDR_CS0_BNDS                0x0000003f
@@ -267,7 +265,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
@@ -414,12 +411,6 @@ extern unsigned long get_sdram_size(void);
 #undef CONFIG_SYS_RAMBOOT
 #endif
 
-#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399
-#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT)
-#define CONFIG_A003399_NOR_WORKAROUND
-#endif
-#endif
-
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR       0xffd00000 /* stack in RAM */
 #define CONFIG_SYS_INIT_RAM_SIZE       0x00004000 /* End of used area in RAM */
@@ -529,8 +520,6 @@ extern unsigned long get_sdram_size(void);
 #define TSEC2_PHYIDX           0
 #define TSEC3_PHYIDX           0
 
-#define CONFIG_ETHPRIME                "eTSEC1"
-
 /* TBI PHY configuration for SGMII mode */
 #define CONFIG_TSEC_TBICR_SETTINGS ( \
                TBICR_PHY_RESET \
@@ -545,7 +534,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_FSL_SATA_V2
 
 #ifdef CONFIG_FSL_SATA
-#define CONFIG_SYS_SATA_MAX_DEVICE     2
 #define CONFIG_SATA1
 #define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
 #define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
@@ -608,14 +596,7 @@ extern unsigned long get_sdram_size(void);
  * Environment Configuration
  */
 
-#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_HAS_ETH0
-#define CONFIG_HAS_ETH1
-#define CONFIG_HAS_ETH2
-#endif
-
 #define CONFIG_ROOTPATH                "/opt/nfsroot"
-#define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       u-boot.bin/* U-Boot image on TFTP server */
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
@@ -645,10 +626,10 @@ extern unsigned long get_sdram_size(void);
        "ext2load usb 0:4 $fdtaddr $fdtfile;"   \
        "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"   \
        "bootm $loadaddr $ramdiskaddr $fdtaddr\0"       \
-       CONFIG_BOOTMODE
+       BOOTMODE
 
 #if defined(CONFIG_TARGET_P1010RDB_PA)
-#define CONFIG_BOOTMODE \
+#define BOOTMODE \
        "boot_bank0=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \
        "mw.b ffb00011 0; mw.b ffb00009 0; reset\0" \
        "boot_bank1=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \
@@ -657,7 +638,7 @@ extern unsigned long get_sdram_size(void);
        "mw.b ffb00011 0; mw.b ffb00017 1; reset\0"
 
 #elif defined(CONFIG_TARGET_P1010RDB_PB)
-#define CONFIG_BOOTMODE \
+#define BOOTMODE \
        "boot_bank0=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \
        "i2c mw 19 1 2; i2c mw 19 3 e1; reset\0" \
        "boot_bank1=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \