#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_MMC_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_SPI_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
#ifdef CONFIG_NAND
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#else
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#endif
#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/*