Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / P1010RDB.h

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 02b0b71..106d1e6 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -14,7 +14,6 @@
 #include <linux/stringify.h>
 
 #include <asm/config_mpc85xx.h>
-#define CONFIG_NAND_FSL_IFC
 
 #ifdef CONFIG_SDCARD
 #define CONFIG_SPL_FLUSH_IMAGE
@@ -64,19 +63,16 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    ((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    0
 #else
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE            (128 << 10)
-#define CONFIG_TPL_TEXT_BASE           0xD0001000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (576 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START   (0x11000000)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    ((128 + 128) << 10)
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_NAND_MINIMAL
@@ -85,7 +81,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xD0000000
 #define CONFIG_SYS_NAND_U_BOOT_START   0xD0000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    (128 << 10)
 #endif
 #define CONFIG_SPL_PAD_TO      0x20000
 #define CONFIG_TPL_PAD_TO      0x20000
@@ -103,7 +98,7 @@
 #endif
 
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        0xD0001000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
 #else
@@ -111,12 +106,10 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_HAS_SERDES          /* common SERDES init code */
 
 #if defined(CONFIG_PCI)
 #define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2                   /* PCIE controller 2 (slot 2) */
-#define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
 /*
  * PCI Windows
@@ -153,8 +146,6 @@
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif
 
-#define CONFIG_SYS_CLK_FREQ    66666666 /* SYSCLK for P1010 RDB */
-
 #define CONFIG_HWCONFIG
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -276,7 +267,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
@@ -309,10 +299,8 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PGS_512     /* Page Size = 512b */ \
                                | CSOR_NAND_SPRZ_16     /* Spare size = 16 */ \
                                | CSOR_NAND_PB(32))     /* 32 Pages Per Block */
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (16 * 1024)
 
 #elif defined(CONFIG_TARGET_P1010RDB_PB)
-#define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_CSOR   (CSOR_NAND_ECC_ENC_EN   /* ECC on encode */ \
                                | CSOR_NAND_ECC_DEC_EN  /* ECC on decode */ \
                                | CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
@@ -320,7 +308,6 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PGS_4K      /* Page Size = 4K */ \
                                | CSOR_NAND_SPRZ_224    /* Spare size = 224 */ \
                                | CSOR_NAND_PB(128))  /*Pages Per Block = 128 */
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 #endif
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
@@ -557,7 +544,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_FSL_SATA_V2
 
 #ifdef CONFIG_FSL_SATA
-#define CONFIG_SYS_SATA_MAX_DEVICE     2
 #define CONFIG_SATA1
 #define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
 #define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
@@ -577,7 +563,6 @@ extern unsigned long get_sdram_size(void);
 #if defined(CONFIG_HAS_FSL_DR_USB)
 #ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_EHCI_FSL
 #endif
 #endif
 
@@ -601,8 +586,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_LOADS_ECHO              /* echo on for serial download */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   /* allow baudrate change */
 
-#undef CONFIG_WATCHDOG                 /* watchdog disabled */
-
 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
                 || defined(CONFIG_FSL_SATA)
 #endif
@@ -619,10 +602,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_BOOTMAPSZ   (64 << 20) /* Initial Memory map for Linux */
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20) /* Increase max gunzip size */
 
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
-#endif
-
 /*
  * Environment Configuration
  */
@@ -689,16 +668,6 @@ extern unsigned long get_sdram_size(void);
        "i2c mw 19 1 4; i2c mw 19 3 f3; reset\0"
 #endif
 
-#define RAMBOOTCOMMAND         \
-       "setenv bootargs root=/dev/ram rw "     \
-       "console=$consoledev,$baudrate $othbootargs; "  \
-       "tftp $ramdiskaddr $ramdiskfile;"       \
-       "tftp $loadaddr $bootfile;"             \
-       "tftp $fdtaddr $fdtfile;"               \
-       "bootm $loadaddr $ramdiskaddr $fdtaddr"
-
-#define CONFIG_BOOTCOMMAND RAMBOOTCOMMAND
-
 #include <asm/fsl_secure_boot.h>
 
 #endif /* __CONFIG_H */