* (C) Copyright 2004-2008
* Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define CONFIG_MPC5xxx 1
#define CONFIG_MPC5200 1
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#endif
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_MISC_INIT_R 1
#define MV_CI mvBlueCOUGAR-P
#define MV_VCI mvBlueCOUGAR-P
#define MV_FPGA_DATA 0xff860000
-#define MV_FPGA_SIZE 0x0003c886
-#define MV_KERNEL_ADDR 0xffc00000
+#define MV_FPGA_SIZE 0
+#define MV_KERNEL_ADDR 0xffd00000
#define MV_INITRD_ADDR 0xff900000
-#define MV_INITRD_LENGTH 0x00300000
+#define MV_INITRD_LENGTH 0x00400000
#define MV_SCRATCH_ADDR 0x00000000
#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
-#define MV_AUTOSCR_ADDR 0xff840000
-#define MV_AUTOSCR_ADDR2 0xff850000
+#define MV_SCRIPT_ADDR 0xff840000
+#define MV_SCRIPT_ADDR2 0xff850000
#define MV_DTB_ADDR 0xfffc0000
#define CONFIG_SHOW_BOOT_PROGRESS 1
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_PCI
#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_I2C
#undef CONFIG_WATCHDOG
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 1000
-#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \
- then autoscr ${autoscr_addr}; \
- else autoscr ${autoscr_addr2}; \
+#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; \
+ then source ${script_addr}; \
+ else source ${script_addr2}; \
fi;"
#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs"
#define CONFIG_ENV_OVERWRITE
-#define XMK_STR(x) #x
-#define MK_STR(x) XMK_STR(x)
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"console_nr=0\0" \
"console=yes\0" \
"stdout=serial\0" \
"stderr=serial\0" \
"fpga=0\0" \
- "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \
- "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \
- "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \
- "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \
- "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \
- "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \
- "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \
- "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0" \
- "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0" \
- "mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0" \
- "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0" \
- "dtb_name=" MK_STR(MV_DTB_NAME) "\0" \
- "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0" \
- "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0" \
+ "fpgadata=" __stringify(MV_FPGA_DATA) "\0" \
+ "fpgadatasize=" __stringify(MV_FPGA_SIZE) "\0" \
+ "script_addr=" __stringify(MV_SCRIPT_ADDR) "\0" \
+ "script_addr2=" __stringify(MV_SCRIPT_ADDR2) "\0" \
+ "mv_kernel_addr=" __stringify(MV_KERNEL_ADDR) "\0" \
+ "mv_kernel_addr_ram=" __stringify(MV_KERNEL_ADDR_RAM) "\0" \
+ "mv_initrd_addr=" __stringify(MV_INITRD_ADDR) "\0" \
+ "mv_initrd_addr_ram=" __stringify(MV_INITRD_ADDR_RAM) "\0" \
+ "mv_initrd_length=" __stringify(MV_INITRD_LENGTH) "\0" \
+ "mv_dtb_addr=" __stringify(MV_DTB_ADDR) "\0" \
+ "mv_dtb_addr_ram=" __stringify(MV_DTB_ADDR_RAM) "\0" \
+ "dtb_name=" __stringify(MV_DTB_NAME) "\0" \
+ "mv_scratch_addr=" __stringify(MV_SCRATCH_ADDR) "\0" \
+ "mv_scratch_length=" __stringify(MV_SCRATCH_LENGTH) "\0" \
"mv_version=" U_BOOT_VERSION "\0" \
- "dhcp_client_id=" MK_STR(MV_CI) "\0" \
- "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \
+ "dhcp_client_id=" __stringify(MV_CI) "\0" \
+ "dhcp_vendor-class-identifier=" __stringify(MV_VCI) "\0" \
"netretry=no\0" \
"use_static_ipaddr=no\0" \
"static_ipaddr=192.168.90.10\0" \
"propdev_debug=0\0" \
"gevss_debug=0\0" \
"watchdog=1\0" \
+ "sensor_cnt=1\0" \
""
-#undef XMK_STR
-#undef MK_STR
-
/*
* IPB Bus clocking configuration.
*/
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_LOWBOOT
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_SIZE 0x00800000
/*
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
-#define CONFIG_SYS_GBL_DATA_SIZE 128
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_MODULE 1
+#define CONFIG_SYS_I2C_SPEED 86000
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+/*
* Ethernet configuration
*/
-#define CONFIG_NET_MULTI
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_E1000
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#undef CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#ifdef CONFIG_CMD_KGDB
#undef FPGA_DEBUG
#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
-#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2
+#define CONFIG_FPGA
#define CONFIG_FPGA_ALTERA 1
#define CONFIG_FPGA_CYCLON2 1
#define CONFIG_FPGA_COUNT 1
projects / platform / kernel / u-boot.git / blobdiff