Merge branch 'master' of git://git.denx.de/u-boot-arm

[platform/kernel/u-boot.git] / include / configs / MPC8569MDS.h

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index dd7278c..d877e8b 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -1,23 +1,7 @@
 /*
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -41,6 +25,7 @@
 #define CONFIG_PCI             1       /* Disable PCI/PCIE */
 #define CONFIG_PCIE1           1       /* PCIE controller */
 #define CONFIG_FSL_PCI_INIT    1       /* use common fsl pci init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #define CONFIG_QE                      /* Enable QE */
@@ -108,12 +93,12 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR             0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
-#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_NAND_SPL)
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 #endif
 
 /* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
@@ -274,7 +259,6 @@ extern unsigned long get_clock_freq(void);
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX              1
-#define CONFIG_SERIAL_MULTI            1
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
@@ -292,7 +276,6 @@ extern unsigned long get_clock_freq(void);
 /* Use the HUSH parser*/
 #define CONFIG_SYS_HUSH_PARSER
 #ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
 /* pass open firmware flat tree */
@@ -303,15 +286,15 @@ extern unsigned long get_clock_freq(void);
 /*
  * I2C
  */
-#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C                /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C         /* I2C bit-banged */
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_SPEED   400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE   0x7F
-#define CONFIG_SYS_I2C_NOPROBES        {{0,0x69}}      /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_OFFSET  0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
+#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x69} }
 
 /*
  * I2C2 EEPROM
@@ -480,7 +463,6 @@ extern unsigned long get_clock_freq(void);
 
 #if defined(CONFIG_PCI)
 
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
@@ -491,10 +473,6 @@ extern unsigned long get_clock_freq(void);
 
 #endif /* CONFIG_PCI */
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 /*
  * Environment
  */
@@ -515,7 +493,8 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */
 
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR  0xfff00000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xfff00000
 
 /*
  * BOOTP options
@@ -566,7 +545,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
 #define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      2048            /* Console I/O Buffer Size */
 #else
@@ -577,7 +555,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MAXARGS     32              /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
                                                /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ  1000            /* decrementer freq: 1ms ticks */
 
 /*
  * For booting Linux, the board info and command line data
@@ -589,15 +566,14 @@ extern unsigned long get_clock_freq(void);
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 /*
  * Environment Configuration
  */
 #define CONFIG_HOSTNAME mpc8569mds
-#define CONFIG_ROOTPATH  /nfsroot
-#define CONFIG_BOOTFILE  your.uImage
+#define CONFIG_ROOTPATH  "/nfsroot"
+#define CONFIG_BOOTFILE  "your.uImage"
 
 #define CONFIG_SERVERIP  192.168.1.1
 #define CONFIG_GATEWAYIP 192.168.1.1