85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
[platform/kernel/u-boot.git] / include / configs / MPC8568MDS.h
index 77abe4f..fcaca1a 100644 (file)
@@ -322,20 +322,23 @@ extern unsigned long get_clock_freq(void);
  * General PCI
  * Memory Addresses are mapped 1-1. I/O is mapped from 0
  */
+#define CONFIG_SYS_PCI1_MEM_VIRT       0x80000000
 #define CONFIG_SYS_PCI1_MEM_BUS        0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BUS
+#define CONFIG_SYS_PCI1_MEM_PHYS       0x80000000
 #define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M */
 #define CONFIG_SYS_PCI1_IO_BUS 0x00000000
 #define CONFIG_SYS_PCI1_IO_PHYS        0xe2000000
 #define CONFIG_SYS_PCI1_IO_SIZE        0x00800000      /* 8M */
 
+#define CONFIG_SYS_PCIE1_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xa0000000
-#define CONFIG_SYS_PCIE1_MEM_PHYS      CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_MEM_PHYS      0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
 #define CONFIG_SYS_PCIE1_IO_BUS        0x00000000
 #define CONFIG_SYS_PCIE1_IO_PHYS       0xe2800000
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x00800000      /* 8M */
 
+#define CONFIG_SYS_SRIO_MEM_VIRT       0xc0000000
 #define CONFIG_SYS_SRIO_MEM_BUS        0xc0000000
 #define CONFIG_SYS_SRIO_MEM_PHYS       0xc0000000