include/configs/[H-N]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_...

[platform/kernel/u-boot.git] / include / configs / MPC8548CDS.h

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 7c4849f..cef92d2 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -36,12 +36,12 @@
 #define CONFIG_MPC8548         1       /* MPC8548 specific */
 #define CONFIG_MPC8548CDS      1       /* MPC8548CDS board specific */
 
-#undef CONFIG_PCI
+#define CONFIG_PCI
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_DLL                 /* possible DLL fix needed */
-#define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
+#undef CONFIG_DDR_2T_TIMING            /* Sets the 2T timing bit */
 
 #define CONFIG_DDR_ECC                 /* only for ECC DDR module */
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
@@ -340,22 +340,34 @@ extern unsigned long get_clock_freq(void);
 
 /*
  * General PCI
- * Addresses are mapped 1-1.
+ * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CFG_PCI1_MEM_BASE      0x80000000
 #define CFG_PCI1_MEM_PHYS      CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE      0x20000000      /* 512M */
+#define CFG_PCI1_MEM_SIZE      0x10000000      /* 256M */
 #define CFG_PCI1_IO_BASE       0x00000000
 #define CFG_PCI1_IO_PHYS       0xe2000000
-#define CFG_PCI1_IO_SIZE       0x00100000      /* 1M */
+#define CFG_PCI1_IO_SIZE       0x00800000      /* 8M */
 
-#define CFG_PCI2_MEM_BASE      0xa0000000
+#define CFG_PCI2_MEM_BASE      0x90000000
 #define CFG_PCI2_MEM_PHYS      CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE      0x20000000      /* 512M */
+#define CFG_PCI2_MEM_SIZE      0x10000000      /* 256M */
 #define CFG_PCI2_IO_BASE       0x00000000
-#define CFG_PCI2_IO_PHYS       0xe2100000
-#define CFG_PCI2_IO_SIZE       0x00100000      /* 1M */
+#define CFG_PCI2_IO_PHYS       0xe2800000
+#define CFG_PCI2_IO_SIZE       0x00800000      /* 8M */
 
+#define CFG_PEX_MEM_BASE       0xa0000000
+#define CFG_PEX_MEM_PHYS       CFG_PEX_MEM_BASE
+#define CFG_PEX_MEM_SIZE       0x20000000      /* 512M */
+#define CFG_PEX_IO_BASE                0x00000000
+#define CFG_PEX_IO_PHYS                0xe3000000
+#define CFG_PEX_IO_SIZE                0x01000000      /* 16M */
+
+/*
+ * RapidIO MMU
+ */
+#define CFG_RIO_MEM_BASE       0xC0000000
+#define CFG_RIO_MEM_SIZE       0x20000000      /* 512M */
 
 #if defined(CONFIG_PCI)
 
@@ -379,14 +391,14 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "eTSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "eTSEC1"
-#define CONFIG_MPC85XX_TSEC3   1
-#define CONFIG_MPC85XX_TSEC3_NAME      "eTSEC2"
-#undef CONFIG_MPC85XX_TSEC4
-#define CONFIG_MPC85XX_TSEC4_NAME      "eTSEC3"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "eTSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "eTSEC1"
+#define CONFIG_TSEC3   1
+#define CONFIG_TSEC3_NAME      "eTSEC2"
+#undef CONFIG_TSEC4
+#define CONFIG_TSEC4_NAME      "eTSEC3"
 #undef CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR         0
@@ -415,19 +427,19 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change */
 
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
 #if defined(CONFIG_PCI)
-#define  CONFIG_COMMANDS       (CONFIG_CMD_DFL \
-                               | CFG_CMD_PCI \
-                               | CFG_CMD_PING \
-                               | CFG_CMD_I2C \
-                               | CFG_CMD_MII)
-#else
-#define  CONFIG_COMMANDS       (CONFIG_CMD_DFL \
-                               | CFG_CMD_PING \
-                               | CFG_CMD_I2C \
-                               | CFG_CMD_MII)
+    #define CONFIG_CMD_PCI
 #endif
-#include <cmd_confdefs.h>
+
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled */
 
@@ -437,7 +449,7 @@ extern unsigned long get_clock_freq(void);
 #define CFG_LONGHELP                   /* undef to save memory */
 #define CFG_LOAD_ADDR  0x2000000       /* default load address */
 #define CFG_PROMPT     "=> "           /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE     1024            /* Console I/O Buffer Size */
 #else
 #define CFG_CBSIZE     256             /* Console I/O Buffer Size */
@@ -457,7 +469,7 @@ extern unsigned long get_clock_freq(void);
 /* Cache Configuration */
 #define CFG_DCACHE_SIZE        32768
 #define CFG_CACHELINE_SIZE     32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
 #endif
 
@@ -469,7 +481,7 @@ extern unsigned long get_clock_freq(void);
 #define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM  0x02            /* Software reboot */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif