Merge git://git.denx.de/u-boot-mpc85xx

[platform/kernel/u-boot.git] / include / configs / MPC8548CDS.h

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index dd07dc4..c241b51 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -13,18 +13,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_DISPLAY_BOARDINFO
-
-#ifdef CONFIG_36BIT
-#define CONFIG_PHYS_64BIT
-#endif
-
-/* High Level Configuration Options */
-#define CONFIG_BOOKE           1       /* BOOKE */
-#define CONFIG_E500            1       /* BOOKE e500 family */
-#define CONFIG_MPC8548         1       /* MPC8548 specific */
-#define CONFIG_MPC8548CDS      1       /* MPC8548CDS board specific */
-
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE   0xfff80000
 #endif
@@ -32,9 +20,8 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 
-#define CONFIG_PCI             /* enable any pci type devices */
 #define CONFIG_PCI1            /* PCI controller 1 */
-#define CONFIG_PCIE1           /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1           /* PCIE controller 1 (slot 1) */
 #undef CONFIG_PCI2
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
@@ -44,7 +31,6 @@
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_INTERRUPTS              /* enable pci, srio, ddr interrupts */
-#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
 #define CONFIG_FSL_VIA
 
@@ -76,7 +62,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
@@ -88,7 +73,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000      /* DDR is system memory*/
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
@@ -410,9 +394,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #if defined(CONFIG_PCI)
-
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
-
 #undef CONFIG_EEPRO100
 #undef CONFIG_TULIP
 
@@ -540,7 +521,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR        1000000 /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200
@@ -563,7 +543,7 @@ extern unsigned long get_clock_freq(void);
        "consoledev=ttyS1\0"                    \
        "ramdiskaddr=2000000\0"                 \
        "ramdiskfile=ramdisk.uboot\0"           \
-       "fdtaddr=c00000\0"                      \
+       "fdtaddr=1e00000\0"                     \
        "fdtfile=mpc8548cds.dtb\0"
 
 #define CONFIG_NFSBOOTCOMMAND                                          \