rename CFG_ENV macros to CONFIG_ENV

[platform/kernel/u-boot.git] / include / configs / MPC8548CDS.h

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 2d44df4..68bc106 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -46,17 +46,11 @@
 
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_DLL                 /* possible DLL fix needed */
-#undef CONFIG_DDR_2T_TIMING            /* Sets the 2T timing bit */
-
-#define CONFIG_DDR_ECC                 /* only for ECC DDR module */
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
-#define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 #define CONFIG_INTERRUPTS              /* enable pci, srio, ddr interrupts */
-
 #define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
+#define CONFIG_FSL_VIA
+
 /*
  * When initializing flash, if we cannot find the manufacturer ID,
  * assume this is the AMD flash associated with the CDS board.
@@ -64,8 +58,6 @@
  */
 #define CONFIG_ASSUME_AMD_FLASH
 
-#define MPC85xx_DDR_SDRAM_CLK_CNTL     /* 85xx has clock control reg */
-
 #ifndef __ASSEMBLY__
 extern unsigned long get_clock_freq(void);
 #endif
@@ -84,9 +76,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
-#define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
-
-#undef CFG_DRAM_TEST                   /* memory test, takes time */
 #define CFG_MEMTEST_START      0x00200000      /* memtest works on */
 #define CFG_MEMTEST_END                0x00400000
 
@@ -103,17 +92,27 @@ extern unsigned long get_clock_freq(void);
 #define CFG_PCI2_ADDR  (CFG_CCSRBAR+0x9000)
 #define CFG_PCIE1_ADDR (CFG_CCSRBAR+0xa000)
 
-/*
- * DDR Setup
- */
+/* DDR Setup */
+#define CONFIG_FSL_DDR2
+#undef CONFIG_FSL_DDR_INTERACTIVE
+#define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
+#define CONFIG_DDR_SPD
+#define CONFIG_DDR_DLL                 /* possible DLL fix needed */
+
+#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER       /* DDR controller or DMA? */
+#define CONFIG_MEM_INIT_VALUE  0xDeadBeef
+
 #define CFG_DDR_SDRAM_BASE     0x00000000      /* DDR is system memory*/
 #define CFG_SDRAM_BASE         CFG_DDR_SDRAM_BASE
 
-#define SPD_EEPROM_ADDRESS     0x51            /* DDR DIMM */
+#define CONFIG_NUM_DDR_CONTROLLERS     1
+#define CONFIG_DIMM_SLOTS_PER_CTLR     1
+#define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
-/*
- * Make sure required options are set
- */
+/* I2C addresses of SPD EEPROMs */
+#define SPD_EEPROM_ADDRESS     0x51    /* CTLR 0 DIMM 0 */
+
+/* Make sure required options are set */
 #ifndef CONFIG_SPD_EEPROM
 #error ("CONFIG_SPD_EEPROM is required")
 #endif
@@ -172,7 +171,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CFG_MONITOR_BASE       TEXT_BASE       /* start of monitor */
 
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
 #define CFG_FLASH_CFI
 #define CFG_FLASH_EMPTY_INFO
 
@@ -297,6 +296,8 @@ extern unsigned long get_clock_freq(void);
  * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
  */
 
+#define CONFIG_FSL_CADMUS
+
 #define CADMUS_BASE_ADDR 0xf8000000
 #define CFG_BR3_PRELIM  0xf8000801
 #define CFG_OR3_PRELIM  0xfff00ff7
@@ -340,6 +341,9 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_OF_BOARD_SETUP          1
 #define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
+#define CFG_64BIT_VSPRINTF     1
+#define CFG_64BIT_STRTOUL      1
+
 /*
  * I2C
  */
@@ -347,11 +351,17 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C         /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
 #define CFG_I2C_OFFSET         0x3000
 
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_CCID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR     0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
@@ -456,10 +466,10 @@ extern unsigned long get_clock_freq(void);
 /*
  * Environment
  */
-#define CFG_ENV_IS_IN_FLASH    1
-#define CFG_ENV_ADDR           (CFG_MONITOR_BASE + 0x40000)
-#define CFG_ENV_SECT_SIZE      0x40000 /* 256K(one sector) for env */
-#define CFG_ENV_SIZE           0x2000
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR                (CFG_MONITOR_BASE + 0x40000)
+#define CONFIG_ENV_SECT_SIZE   0x40000 /* 256K(one sector) for env */
+#define CONFIG_ENV_SIZE                0x2000
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change */