#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
+#define PIXIS_VSPEED2 0x1d /* VELA VSpeed 2 */
#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/
+#define PIXIS_VSPEED2_TSEC1SER 0x2
+#define PIXIS_VSPEED2_TSEC3SER 0x1
+#define PIXIS_VCFGEN1_TSEC1SER 0x20
+#define PIXIS_VCFGEN1_TSEC3SER 0x40
/* define to use L1 as initial stack */
/*
* Environment
*/
-#define CFG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH 1
#if CFG_MONITOR_BASE > 0xfff80000
-#define CFG_ENV_ADDR 0xfff80000
+#define CONFIG_ENV_ADDR 0xfff80000
#else
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x70000)
+#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + 0x70000)
#endif
-#define CFG_ENV_SIZE 0x2000
-#define CFG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */