#define CFG_IMMR 0xE0000000 /* The IMMR is relocated to here */
+#define CONFIG_MISC_INIT_F
+#define CONFIG_MISC_INIT_R
-/* On-board devices */
+/*
+ * On-board devices
+ */
#ifdef CONFIG_MPC8349ITX
#define CONFIG_COMPACT_FLASH /* The CF card interface on the back of the board */
-#define CONFIG_VSC7385 /* The Vitesse 7385 5-port switch */
+#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
#endif
#define CONFIG_PCI
/* I2C */
#ifdef CONFIG_HARD_I2C
-#define CONFIG_MISC_INIT_F
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
* DDR Setup
*/
#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
-#define CFG_SDRAM_BASE CFG_DDR_BASE
-#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
+#define CFG_SDRAM_BASE CFG_DDR_BASE
+#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
#define CFG_83XX_DDR_USES_CS0
#define CFG_MEMTEST_START 0x1000 /* memtest region */
#define CFG_MEMTEST_END 0x2000
+#define CFG_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
+ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
+
#ifdef CONFIG_HARD_I2C
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
#endif
*/
#define CFG_FLASH_CFI /* use the Common Flash Interface */
-#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
#define CFG_FLASH_EMPTY_INFO
#define CFG_MAX_FLASH_SECT 135 /* 127 64KB sectors + 8 8KB sectors per device */
boards, we say we have two, but don't display a message if we find only one. */
#define CFG_FLASH_QUIET_TEST
#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
-#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE + 0x800000}
+#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE + 0x800000}
#define CFG_FLASH_SIZE 16 /* FLASH size in MB */
#define CFG_FLASH_SIZE_SHIFT 4 /* log2 of the above value */
+/* Vitesse 7385 */
+
+#ifdef CONFIG_VSC7385_ENET
+
+#define CONFIG_TSEC2
+
+/* The flash address and size of the VSC7385 firmware image */
+#define CONFIG_VSC7385_IMAGE 0xFEFFE000
+#define CONFIG_VSC7385_IMAGE_SIZE 8192
+
+#endif
+
/*
* BRx, ORx, LBLAWBARx, and LBLAWARx
*/
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_PS_16 | BR_V)
#define CFG_OR0_PRELIM ((~(CFG_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \
- OR_GPCM_CSNT | OR_GPCM_ACS_0b11 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
+ OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD)
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE
#define CFG_LBLAWAR0_PRELIM (LBLAWAR_EN | (0x13 + CFG_FLASH_SIZE_SHIFT))
/* Vitesse 7385 */
-#ifdef CONFIG_VSC7385
-
#define CFG_VSC7385_BASE 0xF8000000
+#ifdef CONFIG_VSC7385_ENET
+
#define CFG_BR1_PRELIM (CFG_VSC7385_BASE | BR_PS_8 | BR_V)
#define CFG_OR1_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \
#define CFG_LED_BASE 0xF9000000
#define CFG_BR2_PRELIM (CFG_LED_BASE | BR_PS_8 | BR_V)
-#define CFG_OR2_PRELIM (OR_AM_2MB | OR_GPCM_CSNT | OR_GPCM_ACS_0b11 | \
+#define CFG_OR2_PRELIM (OR_AM_2MB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_XACS | OR_GPCM_SCY_9 | OR_GPCM_TRLX | \
OR_GPCM_EHTR | OR_GPCM_EAD)
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+/* CFG_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+#define CONFIG_CONSOLE ttyS0
#define CONFIG_BAUDRATE 115200
#define CFG_NS16550_COM1 (CFG_IMMR + 0x4500)
#define CFG_NS16550_COM2 (CFG_IMMR + 0x4600)
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE
-#define CONFIG_OF_BOARD_SETUP
-
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
-#define OF_CPU "PowerPC,8349@0"
-#define OF_SOC "soc8349@e0000000"
-#define OF_TBCLK (bd->bi_busfreq / 4)
-#define OF_STDOUT_PATH "/soc8349@e0000000/serial@4500"
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/*
* PCI
#define CONFIG_NET_MULTI
#define CONFIG_MII
-#define CONFIG_PHY_GIGE /* In case CFG_CMD_MII is specified */
+#define CONFIG_PHY_GIGE /* In case CONFIG_CMD_MII is specified */
-#define CONFIG_MPC83XX_TSEC1
+#define CONFIG_TSEC1
-#ifdef CONFIG_MPC83XX_TSEC1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
+#ifdef CONFIG_TSEC1
+#define CONFIG_HAS_ETH0
+#define CONFIG_TSEC1_NAME "TSEC0"
#define CFG_TSEC1_OFFSET 0x24000
#define TSEC1_PHY_ADDR 0x1c /* VSC8201 uses address 0x1c */
#define TSEC1_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
#define CONFIG_HAS_ETH1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC2_NAME "TSEC1"
#define CFG_TSEC2_OFFSET 0x25000
-#define CONFIG_UNKNOWN_TSEC /* TSEC2 is proprietary */
+
#define TSEC2_PHY_ADDR 4
#define TSEC2_PHYIDX 0
+#define TSEC2_FLAGS TSEC_GIGABIT
#endif
#define CONFIG_ETHPRIME "Freescale TSEC"
#define CONFIG_ENV_OVERWRITE
#ifndef CFG_RAMBOOT
- #define CFG_ENV_IS_IN_FLASH
- #define CFG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */
- #define CFG_ENV_ADDR (CFG_MONITOR_BASE + (4 * CFG_ENV_SECT_SIZE))
- #define CFG_ENV_SIZE 0x2000
+ #define CONFIG_ENV_IS_IN_FLASH
+ #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+ #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */
+ #define CONFIG_ENV_SIZE 0x2000
#else
#define CFG_NO_FLASH /* Flash is not usable now */
- #define CFG_ENV_IS_NOWHERE /* Store ENV in memory only */
- #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
- #define CFG_ENV_SIZE 0x2000
+ #undef CONFIG_FLASH_CFI_DRIVER
+ #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
+ #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
+ #define CONFIG_ENV_SIZE 0x2000
#endif
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */
-/* CONFIG_COMMANDS */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
#ifdef CONFIG_COMPACT_FLASH
-#define CONFIG_COMMANDS_CF (CFG_CMD_IDE | CFG_CMD_FAT)
-#else
-#define CONFIG_COMMANDS_CF 0
+ #define CONFIG_CMD_IDE
+ #define CONFIG_CMD_FAT
#endif
#ifdef CONFIG_PCI
-#define CONFIG_COMMANDS_PCI CFG_CMD_PCI
-#else
-#define CONFIG_COMMANDS_PCI 0
+ #define CONFIG_CMD_PCI
#endif
#ifdef CONFIG_HARD_I2C
-#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
-#else
-#define CONFIG_COMMANDS_I2C 0
+ #define CONFIG_CMD_I2C
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CONFIG_COMMANDS_CF | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CONFIG_COMMANDS_I2C | \
- CONFIG_COMMANDS_PCI | \
- CFG_CMD_SDRAM | \
- CFG_CMD_DATE | \
- CFG_CMD_CACHE | \
- CFG_CMD_IRQ)
-#include <cmd_confdefs.h>
-
/* Watchdog */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
#ifdef CONFIG_MPC8349ITX
#define CFG_PROMPT "MPC8349E-mITX> " /* Monitor Command Prompt */
#define CFG_PROMPT "MPC8349E-mITX-GP> " /* Monitor Command Prompt */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE 32768
-#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log2 of the above value */
-#endif
-
#define CFG_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
HRCWL_DDR_TO_SCB_CLK_1X1 |\
#define CFG_HID0_FINAL CFG_HID0_INIT
#define CFG_HID2 HID2_HBE
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR */
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
#endif
#define CONFIG_BOOTARGS \
"root=/dev/nfs rw" \
" nfsroot=" MK_STR(CONFIG_SERVERIP) ":" MK_STR(CONFIG_ROOTPATH) \
- " ip=" MK_STR(CONFIG_IPADDR) ":" MK_STR(CONFIG_SERVERIP) ":" \
+ " ip=" MK_STR(CONFIG_IPADDR) ":" MK_STR(CONFIG_SERVERIP) ":" \
MK_STR(CONFIG_GATEWAYIP) ":" MK_STR(CONFIG_NETMASK) ":" \
MK_STR(CONFIG_HOSTNAME) ":" MK_STR(CONFIG_NETDEV) ":off" \
- " console=ttyS0," MK_STR(CONFIG_BAUDRATE)
+ " console=" MK_STR(CONFIG_CONSOLE) "," MK_STR(CONFIG_BAUDRATE)
#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=" MK_STR(CONFIG_NETDEV) "\0" \
- "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
- "tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "console=" MK_STR(CONFIG_CONSOLE) "\0" \
+ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot; " \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
"fdtaddr=400000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"