Merge tag 'efi-2019-07-rc5-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[platform/kernel/u-boot.git] / include / configs / MPC8349EMDS_SDRAM.h

diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 70fc29e..493f6df 100644 (file)
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -52,9 +52,7 @@
  */
 #undef CONFIG_DDR_32BIT
 
-#define CONFIG_SYS_DDR_BASE    0x00000000      /* DDR is system memory*/
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE  0x00000000      /* DDR is system memory*/
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  (DDR_SDRAM_CLK_CNTL_SS_EN \
                                        | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
 #undef  CONFIG_DDR_2T_TIMING
@@ -153,14 +151,6 @@
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)    /* Reserved for malloc */
 
 /*
- * Local Bus LCRR and LBCR regs
- *    LCRR:  DLL bypass, Clock divider is 4
- * External Local Bus rate is
- *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LBC_LBCR    0x00000000
-
-/*
  * The MPC834xEA MDS for 834xE rev3.1 may not be assembled SDRAM memory.
  */