TQM8xx{L,M}: try to normalize config files for TQM8xx? based board

[platform/kernel/u-boot.git] / include / configs / MPC8349EMDS.h

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 7d5b17b..8705838 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -29,8 +29,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#undef DEBUG
-
 /*
  * High Level Configuration Options
  */
@@ -41,7 +39,7 @@
 #define CONFIG_MPC8349EMDS     1       /* MPC8349EMDS board specific */
 
 #undef CONFIG_PCI
-#undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
+#undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
 
 #define PCI_66M
 #ifdef PCI_66M
@@ -159,7 +157,7 @@
                                (2 << BR_PS_SHIFT) |    /* 16 bit port size */   \
                                BR_V)                   /* valid */
 #define CFG_OR0_PRELIM         ((~(CFG_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \
-                               OR_GPCM_CSNT | OR_GPCM_ACS_0b11 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
+                               OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
                                OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD)
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE  /* window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000018      /* 32 MB window size */
@@ -341,11 +339,7 @@
 /* pass open firmware flat tree */
 #define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
-
-#define OF_CPU                 "PowerPC,8349@0"
-#define OF_SOC                 "soc8349@e0000000"
-#define OF_TBCLK               (bd->bi_busfreq / 4)
-#define OF_STDOUT_PATH         "/soc8349@e0000000/serial@4500"
+#define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /* I2C */
 #define CONFIG_HARD_I2C                        /* I2C with hardware support*/
@@ -359,6 +353,15 @@
 #define CFG_I2C_OFFSET         0x3000
 #define CFG_I2C2_OFFSET                0x3100
 
+/* SPI */
+#define CONFIG_MPC8XXX_SPI
+#undef CONFIG_SOFT_SPI                 /* SPI bit-banged */
+
+/* GPIOs.  Used as SPI chip selects */
+#define CFG_GPIO1_PRELIM
+#define CFG_GPIO1_DIR          0xC0000000  /* SPI CS on 0, LED on 1 */
+#define CFG_GPIO1_DAT          0xC0000000  /* Both are active LOW */
+
 /* TSEC */
 #define CFG_TSEC1_OFFSET 0x24000
 #define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
@@ -410,7 +413,7 @@
 #if !defined(CONFIG_PCI_PNP)
        #define PCI_ENET0_IOADDR        0xFIXME
        #define PCI_ENET0_MEMADDR       0xFIXME
-       #define PCI_IDSEL_NUMBER        0x0c    /* slot0->3(IDSEL)=12->15 */
+       #define PCI_IDSEL_NUMBER        0x0c    /* slot0->3(IDSEL)=12->15 */
 #endif
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
@@ -531,13 +534,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 #define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST  */
 
 #if 1 /*528/264*/
@@ -605,6 +601,16 @@
        HRCWH_TSEC2M_IN_GMII )
 #endif
 
+/*
+ * System performance
+ */
+#define CFG_ACR_PIPE_DEP       3       /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT         3       /* Arbiter repeat count (0-7) */
+#define CFG_SPCR_TSEC1EP       3       /* TSEC1 emergency priority (0-3) */
+#define CFG_SPCR_TSEC2EP       3       /* TSEC2 emergency priority (0-3) */
+#define CFG_SCCR_TSEC1CM       1       /* TSEC1 clock mode (0-3) */
+#define CFG_SCCR_TSEC2CM       1       /* TSEC2 & I2C0 clock mode (0-3) */
+
 /* System IO Config */
 #define CFG_SICRH SICRH_TSOBI1
 #define CFG_SICRL SICRL_LDP_A
@@ -619,6 +625,7 @@
 
 
 #define CFG_HID2 HID2_HBE
+#define CONFIG_HIGH_BATS       1       /* High BATs supported */
 
 /* DDR @ 0x00000000 */
 #define CFG_IBAT0L     (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
@@ -712,7 +719,7 @@
 #define CONFIG_GATEWAYIP       192.168.1.1
 #define CONFIG_NETMASK         255.255.255.0
 
-#define CONFIG_LOADADDR                200000  /* default location for tftp and bootm */
+#define CONFIG_LOADADDR                500000  /* default location for tftp and bootm */
 
 #define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                        /* the boot command will set bootargs */
@@ -720,7 +727,7 @@
 #define CONFIG_BAUDRATE         115200
 
 #define CONFIG_PREBOOT "echo;" \
-       "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+       "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
        "echo"
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
@@ -742,7 +749,7 @@
        "load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0"           \
        "update=protect off fe000000 fe03ffff; "                        \
                "era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0"     \
-       "upd=run load;run update\0"                                     \
+       "upd=run load update\0"                                         \
        "fdtaddr=400000\0"                                              \
        "fdtfile=mpc8349emds.dtb\0"                                     \
        ""