Merge tag 'u-boot-imx-20200804' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

[platform/kernel/u-boot.git] / include / configs / MPC8313ERDB_NOR.h

diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h
index 390ee4e..c223ea5 100644 (file)
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -18,8 +18,8 @@
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #endif
 
+#include <linux/stringify.h>
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_ELBC 1
 
 /*
  * On-board devices
@@ -30,20 +30,12 @@
 #define CONFIG_VSC7385_ENET
 #define CONFIG_TSEC2
 
-#define CONFIG_SYS_IMMR                0xE0000000
-
-#define CONFIG_SYS_MEMTEST_START       0x00001000
-#define CONFIG_SYS_MEMTEST_END         0x07f00000
-
 /* Early revs of this board will lock up hard when attempting
  * to access the PMC registers, unless a JTAG debugger is
  * connected, or some resistor modifications are made.
  */
 #define CONFIG_SYS_8313ERDB_BROKEN_PMC 1
 
-#define CONFIG_SYS_ACR_PIPE_DEP        3       /* Arbiter pipeline depth (0-3) */
-#define CONFIG_SYS_ACR_RPTCNT          3       /* Arbiter repeat count (0-7) */
-
 /*
  * Device configurations
  */
@@ -63,9 +55,7 @@
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_DDR_BASE            0x00000000 /* DDR is system memory*/
-#define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE          0x00000000 /* DDR is system memory*/
 
 /*
  * Manually set up DDR parameters, as this board does not
@@ -166,18 +156,6 @@
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)    /* Reserve 512 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN  (512 * 1024)    /* Reserved for malloc */
 
-/*
- * Local Bus LCRR and LBCR regs
- */
-#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
-#define CONFIG_SYS_LBC_LBCR    (0x00040000 /* TODO */ \
-                               | (0xFF << LBCR_BMT_SHIFT) \
-                               | 0xF)  /* 0x0004ff0f */
-
-                               /* LB refresh timer prescal, 266MHz/32 */
-#define CONFIG_SYS_LBC_MRTPR   0x20000000  /*TODO */
-
 /* drivers/mtd/nand/nand.c */
 #define CONFIG_SYS_NAND_BASE           0xE2800000
 
@@ -188,14 +166,6 @@
 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
 #define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024)
 
-/* FLASH*/
-#define CONFIG_SYS_BR0_PRELIM  (0xFE000000 | BR_PS_16 | BR_MS_GPCM | BR_V)
-#define CONFIG_SYS_OR0_PRELIM  (OR_AM_8MB | OR_GPCM_XACS | OR_GPCM_SCY_9 | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
-
-/* NAND */
-#define CONFIG_SYS_BR1_PRELIM  (0xE2800000 | BR_DECC_CHK_GEN | BR_PS_8 | BR_MS_FCM | BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB | OR_FCM_CSCT | OR_FCM_CST | OR_FCM_CHT | OR_FCM_SCY_1 | OR_FCM_TRLX | OR_FCM_EHTR)
-
 /* Still needed for spl_minimal.c */
 #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM
 #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM
@@ -204,9 +174,6 @@
 #define CONFIG_SYS_BCSR_ADDR           0xFA000000
 #define CONFIG_SYS_BCSR_SIZE           (32 * 1024)     /* 0x00008000 */
                                        /* map at 0xFA000000 on LCS3 */
-/* BCSR */
-#define CONFIG_SYS_BR3_PRELIM          (0xFA000000 | BR_PS_8 | BR_MS_GPCM | BR_V)
-#define CONFIG_SYS_OR3_PRELIM          (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
 /* Vitesse 7385 */
 
 #ifdef CONFIG_VSC7385_ENET
@@ -215,9 +182,6 @@
 #define CONFIG_SYS_VSC7385_BASE                0xF0000000
 #define CONFIG_SYS_VSC7385_SIZE                (128 * 1024)    /* 0x00020000 */
 
-/* VSC7385 */
-#define CONFIG_SYS_BR2_PRELIM          (0xF0000000 | BR_PS_8 | BR_MS_GPCM | BR_V)
-#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
 
 #endif
 
@@ -299,15 +263,7 @@
  * Environment
  */
 #if !defined(CONFIG_SYS_RAMBOOT)
-       #define CONFIG_ENV_ADDR         \
-                       (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-       #define CONFIG_ENV_SECT_SIZE    0x10000 /* 64K(one sector) for env */
-       #define CONFIG_ENV_SIZE         0x2000
-
 /* Address and size of Redundant Environment Sector */
-#else
-       #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
-       #define CONFIG_ENV_SIZE         0x2000
 #endif
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
@@ -319,10 +275,6 @@
 #define CONFIG_BOOTP_BOOTFILESIZE
 
 /*
- * Command line configuration.
- */
-
-/*
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
@@ -349,17 +301,9 @@
                        /* Enable Internal USB Phy and GPIO on LCD Connector */
 #define CONFIG_SYS_SICRL       (SICRL_USBDR_10 | SICRL_LBC)
 
-#define CONFIG_SYS_HID0_INIT   0x000000000
-#define CONFIG_SYS_HID0_FINAL  (HID0_ENABLE_MACHINE_CHECK | \
-                                HID0_ENABLE_INSTRUCTION_CACHE | \
-                                HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
 /*
  * Environment Configuration
  */
-#define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_NETDEV          "eth1"