#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384
+#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
+
+#ifdef CONFIG_NAND_U_BOOT
+#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
+#endif /* CONFIG_NAND_SPL */
+#endif /* CONFIG_NAND_U_BOOT */
+
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xFE000000
#endif
+#ifndef CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
+#endif
+
#define CONFIG_PCI
#define CONFIG_FSL_ELBC 1
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
-
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
-#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384
-#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
#define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \