Merge with /home/sr/git/u-boot

[platform/kernel/u-boot.git] / include / configs / MPC8260ADS.h

diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 626f23b..bba476a 100644 (file)
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -42,6 +42,16 @@
 
 #define CONFIG_MPC8260ADS      1       /* Motorola PQ2 ADS family board */
 
+#define CONFIG_CPM2            1       /* Has a CPM2 */
+
+/*
+ * Figure out if we are booting low via flash HRCW or high via the BCSR.
+ */
+#if (TEXT_BASE != 0xFFF00000)          /* Boot low (flash HRCW) */
+#   define CFG_LOWBOOT          1
+#endif
+
+
 /* ADS flavours */
 #define CFG_8260ADS            1       /* MPC8260ADS */
 #define CFG_8266ADS            2       /* MPC8266ADS */
@@ -175,32 +185,35 @@
 #endif
 #endif
 
-#define CONFIG_BAUDRATE                38400
-
-#define CFG_EXCLUDE             CFG_CMD_BEDBUG | \
-                                CFG_CMD_BMP    | \
-                                CFG_CMD_BSP    | \
-                                CFG_CMD_DATE   | \
-                                CFG_CMD_DOC    | \
-                                CFG_CMD_DTT    | \
-                                CFG_CMD_EEPROM | \
-                                CFG_CMD_ELF    | \
-                                CFG_CMD_FAT    | \
-                                CFG_CMD_FDC    | \
-                                CFG_CMD_FDOS   | \
-                                CFG_CMD_HWFLOW | \
-                                CFG_CMD_IDE    | \
-                                CFG_CMD_KGDB   | \
-                                CFG_CMD_MMC    | \
-                                CFG_CMD_NAND   | \
-                                CFG_CMD_PCI    | \
-                                CFG_CMD_PCMCIA | \
-                                CFG_CMD_REISER | \
-                                CFG_CMD_SCSI   | \
-                                CFG_CMD_SPI    | \
-                                CFG_CMD_USB    | \
-                                CFG_CMD_VFD    | \
-                                CFG_CMD_XIMG
+#define CONFIG_BAUDRATE                115200
+
+#define CFG_EXCLUDE            CFG_CMD_BEDBUG | \
+                               CFG_CMD_BMP     | \
+                               CFG_CMD_BSP     | \
+                               CFG_CMD_DATE    | \
+                               CFG_CMD_DOC     | \
+                               CFG_CMD_DTT     | \
+                               CFG_CMD_EEPROM | \
+                               CFG_CMD_ELF    | \
+                               CFG_CMD_EXT2    | \
+                               CFG_CMD_FAT    | \
+                               CFG_CMD_FDC     | \
+                               CFG_CMD_FDOS    | \
+                               CFG_CMD_HWFLOW  | \
+                               CFG_CMD_IDE     | \
+                               CFG_CMD_KGDB    | \
+                               CFG_CMD_MMC     | \
+                               CFG_CMD_NAND    | \
+                               CFG_CMD_PCI     | \
+                               CFG_CMD_PCMCIA | \
+                               CFG_CMD_REISER  | \
+                               CFG_CMD_SCSI    | \
+                               CFG_CMD_SPI     | \
+                               CFG_CMD_SNTP    | \
+                               CFG_CMD_UNIVERSE | \
+                               CFG_CMD_USB     | \
+                               CFG_CMD_VFD     | \
+                               CFG_CMD_XIMG
 
 #if CONFIG_ADSTYPE >= CFG_PQ2FADS
 #define CONFIG_COMMANDS                (CFG_CMD_ALL & ~( \
@@ -249,7 +262,7 @@
 #define CFG_MEMTEST_START      0x00100000      /* memtest works on */
 #define CFG_MEMTEST_END                0x00f00000      /* 1 ... 15 MB in DRAM  */
 
-#define CFG_LOAD_ADDR          0x100000        /* default load address */
+#define CFG_LOAD_ADDR          0x400000        /* default load address */
 
 #define CFG_HZ                 1000    /* decrementer freq: 1 ms ticks */
 
@@ -271,7 +284,9 @@
 #define CFG_JFFS_CUSTOM_PART
 
 /* this is stuff came out of the Motorola docs */
+#ifndef CFG_LOWBOOT
 #define CFG_DEFAULT_IMMR       0x0F010000
+#endif
 
 #define CFG_IMMR               0xF0000000
 #define CFG_BCSR               0xF4500000
@@ -293,12 +308,21 @@
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
 
-/* 0x0EA28205 */
+#ifdef CFG_LOWBOOT
+/* PQ2FADS flash HRCW = 0x0EB4B645 */
+#define CFG_HRCW_MASTER (   ( HRCW_BPS11 | HRCW_CIP )                      |\
+                           ( HRCW_L2CPC10 | HRCW_DPPC11 | HRCW_ISB100 )    |\
+                           ( HRCW_BMS | HRCW_MMR11 | HRCW_LBPC01 | HRCW_APPC10 ) |\
+                           ( HRCW_CS10PC01 | HRCW_MODCK_H0101 )             \
+                       )
+#else
+/* PQ2FADS BCSR HRCW = 0x0CB23645 */
 #define CFG_HRCW_MASTER (   ( HRCW_BPS11 | HRCW_CIP )                      |\
                            ( HRCW_L2CPC10 | HRCW_DPPC10 | HRCW_ISB010 )    |\
                            ( HRCW_BMS | HRCW_APPC10 )                      |\
                            ( HRCW_MODCK_H0101 )                             \
                        )
+#endif
 /* no slaves */
 #define CFG_HRCW_SLAVE1 0
 #define CFG_HRCW_SLAVE2 0