Re-factoring the legacy NAND code (legacy NAND now only in board-specific

[platform/kernel/u-boot.git] / include / configs / MIP405.h

diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 6c2f17d..1f01e7b 100644 (file)
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -87,6 +87,8 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS  (if any) */
 #include <cmd_confdefs.h>
 
+#define CFG_NAND_LEGACY
+
 #define         CFG_HUSH_PARSER
 #define         CFG_PROMPT_HUSH_PS2 "> "
 /**************************************************************
@@ -257,7 +259,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE                0x4000  /* For IBM 405GPr CPUs                  */
+#define CFG_DCACHE_SIZE                0x4000  /* For AMCC 405GPr CPUs                 */
 #define CFG_CACHELINE_SIZE     32      /* ...                  */
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */