#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
+#define CONFIG_CF_SPI
#define CONFIG_CF_DSPI
#define CONFIG_HARD_SPI
-#define CONFIG_SYS_SER_FLASH_BASE 0x01000000
#define CONFIG_SYS_SBFHDR_SIZE 0x13
#ifdef CONFIG_CMD_SPI
# define CONFIG_SPI_FLASH
# define CONFIG_SPI_FLASH_STMICRO
-# define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \
- DSPI_DCTAR_CPOL | \
- DSPI_DCTAR_CPHA | \
- DSPI_DCTAR_PCSSCK_1CLK | \
- DSPI_DCTAR_PASC(0) | \
- DSPI_DCTAR_PDT(0) | \
- DSPI_DCTAR_CSSCK(0) | \
- DSPI_DCTAR_ASC(0) | \
- DSPI_DCTAR_PBR(0) | \
- DSPI_DCTAR_DT(1) | \
- DSPI_DCTAR_BR(1))
+# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
+ DSPI_CTAR_PCSSCK_1CLK | \
+ DSPI_CTAR_PASC(0) | \
+ DSPI_CTAR_PDT(0) | \
+ DSPI_CTAR_CSSCK(0) | \
+ DSPI_CTAR_ASC(0) | \
+ DSPI_CTAR_DT(1))
#endif
/* PCI */
# define CONFIG_ENV_IS_IN_FLASH 1
#endif
#undef CONFIG_ENV_OVERWRITE
-#undef CONFIG_ENV_IS_EMBEDDED
/*-----------------------------------------------------------------------
* FLASH organization
*/
#ifdef CONFIG_SYS_STMICRO_BOOT
-# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE
-# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE
-# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE
-# define CONFIG_SYS_FLASH2_BASE CONFIG_SYS_CS1_BASE
+# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
+# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS1_BASE
# define CONFIG_ENV_OFFSET 0x30000
# define CONFIG_ENV_SIZE 0x2000
# define CONFIG_ENV_SECT_SIZE 0x10000
#ifdef CONFIG_SYS_FLASH_CFI
# define CONFIG_FLASH_CFI_DRIVER 1
+# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
# define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */