Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[platform/kernel/u-boot.git] / include / configs / M54451EVB.h

diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 6d55bdd..ec42842 100644 (file)
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Configuation settings for the Freescale MCF54451 EVB board.
  *
  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -14,6 +13,8 @@
 #ifndef _M54451EVB_H
 #define _M54451EVB_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -33,23 +34,13 @@
  * BOOTP options
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
 
 /* Network configuration */
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
-#      define CONFIG_MII               1
 #      define CONFIG_MII_INIT          1
 #      define CONFIG_SYS_DISCOVER_PHY
 #      define CONFIG_SYS_RX_ETH_BUFFER 8
 #      define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#      define CONFIG_SYS_FEC0_PINMUX   0
-#      define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
-#      define MCFFEC_TOUT_LOOP 50000
-
 #      define CONFIG_ETHPRIME          "FEC0"
 #      define CONFIG_IPADDR            192.162.1.2
 #      define CONFIG_NETMASK           255.255.255.0
@@ -67,7 +58,7 @@
 #      endif                   /* CONFIG_SYS_DISCOVER_PHY */
 #endif
 
-#define CONFIG_HOSTNAME                M54451EVB
+#define CONFIG_HOSTNAME                "M54451EVB"
 #ifdef CONFIG_SYS_STMICRO_BOOT
 /* ST Micro serial flash */
 #define        CONFIG_SYS_LOAD_ADDR2           0x40010007
@@ -108,7 +99,6 @@
 
 /* Timer */
 #define CONFIG_MCFTMR
-#undef CONFIG_MCFPIT
 
 /* I2c */
 #define CONFIG_SYS_I2C
@@ -119,38 +109,15 @@
 #define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
-#ifdef CONFIG_CMD_SPI
-
-#      define CONFIG_SYS_DSPI_CTAR0    (DSPI_CTAR_TRSZ(7) | \
-                                        DSPI_CTAR_PCSSCK_1CLK | \
-                                        DSPI_CTAR_PASC(0) | \
-                                        DSPI_CTAR_PDT(0) | \
-                                        DSPI_CTAR_CSSCK(0) | \
-                                        DSPI_CTAR_ASC(0) | \
-                                        DSPI_CTAR_DT(1))
-#      define CONFIG_SYS_DSPI_CTAR1    (CONFIG_SYS_DSPI_CTAR0)
-#      define CONFIG_SYS_DSPI_CTAR2    (CONFIG_SYS_DSPI_CTAR0)
-#endif
 
 /* Input, PCI, Flexbus, and VCO */
 #define CONFIG_EXTRA_CLOCK
 
 #define CONFIG_PRAM                    2048    /* 2048 KB */
 
-#define CONFIG_SYS_LONGHELP            /* undef to save memory */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE                      1024    /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE                      256     /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)        /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS             16      /* max number of command args */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 
 #define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + 0x10000)
@@ -187,9 +154,6 @@
 #define CONFIG_SYS_SDRAM_MODE          0x008D0000
 #define CONFIG_SYS_SDRAM_DRV_STRENGTH  0x44
 
-#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END         ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #ifdef CONFIG_CF_SBF
 #      define CONFIG_SERIAL_BOOT
 #      define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_TEXT_BASE + 0x400)
@@ -213,31 +177,17 @@
  * Environment is not embedded in u-boot. First time runing may have env
  * crc error warning if there is no correct environment on the flash.
  */
-#if defined(CONFIG_SYS_STMICRO_BOOT)
-#      define CONFIG_ENV_SPI_CS                1
-#      define CONFIG_ENV_OFFSET                0x20000
-#      define CONFIG_ENV_SIZE          0x2000
-#      define CONFIG_ENV_SECT_SIZE     0x10000
-#else
-#      define CONFIG_ENV_ADDR          (CONFIG_SYS_FLASH_BASE + 0x40000)
-#      define CONFIG_ENV_SIZE          0x2000
-#      define CONFIG_ENV_SECT_SIZE     0x20000
-#endif
 #undef CONFIG_ENV_OVERWRITE
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_CS0_BASE
 
-#define CONFIG_SYS_FLASH_CFI
 #ifdef CONFIG_SYS_FLASH_CFI
 
-#      define CONFIG_FLASH_CFI_DRIVER  1
-#      define CONFIG_SYS_FLASH_USE_BUFFER_WRITE        1
 #      define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
 #      define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 #      define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
 #      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
-#      define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
 #      define CONFIG_SYS_FLASH_CHECKSUM
 #      define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_CS0_BASE }