+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the Freescale MCF54451 EVB board.
*
* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
*/
#define CONFIG_M54451EVB /* M54451EVB board */
-#define CONFIG_DISPLAY_BOARDINFO
-
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_BAUDRATE 115200
+
+#define LDS_BOARD_TEXT board/freescale/m54451evb/sbf_dram_init.o (.text*)
#undef CONFIG_WATCHDOG
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Command line configuration */
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DATE
-#undef CONFIG_CMD_JFFS2
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_REGINFO
/* Network configuration */
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
-# define CONFIG_MII 1
# define CONFIG_MII_INIT 1
# define CONFIG_SYS_DISCOVER_PHY
# define CONFIG_SYS_RX_ETH_BUFFER 8
# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-# define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
-# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
# define CONFIG_ETHPRIME "FEC0"
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
-#define CONFIG_HOSTNAME M54451EVB
+#define CONFIG_HOSTNAME "M54451EVB"
#ifdef CONFIG_SYS_STMICRO_BOOT
/* ST Micro serial flash */
#define CONFIG_SYS_LOAD_ADDR2 0x40010007
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
#define CONFIG_CF_DSPI
#define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
#define CONFIG_SYS_SBFHDR_SIZE 0x7
#ifdef CONFIG_CMD_SPI
#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
* crc error warning if there is no correct environment on the flash.
*/
#if defined(CONFIG_SYS_STMICRO_BOOT)
-# define CONFIG_ENV_IS_IN_SPI_FLASH 1
# define CONFIG_ENV_SPI_CS 1
# define CONFIG_ENV_OFFSET 0x20000
# define CONFIG_ENV_SIZE 0x2000
# define CONFIG_ENV_SECT_SIZE 0x10000
#else
-# define CONFIG_ENV_IS_IN_FLASH 1
# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
# define CONFIG_ENV_SIZE 0x2000
# define CONFIG_ENV_SECT_SIZE 0x20000
/* FLASH organization */
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-#define CONFIG_SYS_FLASH_CFI
#ifdef CONFIG_SYS_FLASH_CFI
-# define CONFIG_FLASH_CFI_DRIVER 1
-# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
-# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
# define CONFIG_SYS_FLASH_CHECKSUM
# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }