#endif
/* Network configuration */
-#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
#define CONFIG_MII_INIT 1
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_TX_ETH_BUFFER 2
#define CONFIG_HAS_ETH1
-#define CONFIG_SYS_FEC0_PINMUX 0
-#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
-#define CONFIG_SYS_FEC1_PINMUX 0
-#define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_MIIBASE
-#define MCFFEC_TOUT_LOOP 50000
-#define CONFIG_SYS_FEC0_PHYADDR 0
-#define CONFIG_SYS_FEC1_PHYADDR 1
-
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_IPADDR 192.168.1.2
#define CONFIG_NETMASK 255.255.255.0
/* Timer */
#define CONFIG_MCFTMR
-#undef CONFIG_MCFPIT
/* I2c */
#undef CONFIG_SYS_FSL_I2C
#define CONFIG_CF_DSPI
#define CONFIG_SERIAL_FLASH
#define CONFIG_SYS_SBFHDR_SIZE 0x7
-#ifdef CONFIG_CMD_SPI
-
-# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
- DSPI_CTAR_PCSSCK_1CLK | \
- DSPI_CTAR_PASC(0) | \
- DSPI_CTAR_PDT(0) | \
- DSPI_CTAR_CSSCK(0) | \
- DSPI_CTAR_ASC(0) | \
- DSPI_CTAR_DT(1))
-# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
-# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
-#endif
/* Input, PCI, Flexbus, and VCO */
#define CONFIG_EXTRA_CLOCK
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
*/
-#if !defined(CONFIG_SERIAL_BOOT) /*MRAM boot*/
-#define CONFIG_ENV_ADDR (0x40000 - 0x1000) /*MRAM size 40000*/
-#define CONFIG_ENV_SIZE 0x1000
-#endif
-#if defined(CONFIG_CF_SBF)
-#define CONFIG_ENV_OFFSET 0x40000
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_SECT_SIZE 0x10000
-#endif
-#if defined(CONFIG_SYS_NAND_BOOT)
-#define CONFIG_ENV_OFFSET 0x80000
-#define CONFIG_ENV_SIZE 0x20000
-#define CONFIG_ENV_SECT_SIZE 0x20000
-#endif
#undef CONFIG_ENV_OVERWRITE
/* FLASH organization */