Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

[platform/kernel/u-boot.git] / include / configs / M5329EVB.h

diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 5c88f09..865d23c 100644 (file)
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -18,10 +18,8 @@
  * (easy to change)
  */
 
-#define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT           (0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT        5000    /* timeout in milliseconds, max timeout is 6.71sec */
 
 #define CONFIG_SYS_UNIFY_CACHE
@@ -49,14 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED       80000
-#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET      0x58000
-#define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
-
-#define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC
 #      define CONFIG_IPADDR    192.162.1.2
@@ -80,8 +70,6 @@
 
 #define CONFIG_PRAM            512     /* 512 KB */
 
-#define CONFIG_SYS_LOAD_ADDR           0x40010000
-
 #define CONFIG_SYS_CLK                 80000000
 #define CONFIG_SYS_CPU_CLK             CONFIG_SYS_CLK * 3
 
@@ -120,7 +108,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 256 kB for Monitor */
 
 #define CONFIG_SYS_BOOTPARAMS_LEN      64*1024
-#define CONFIG_SYS_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc() */
 
 /*
  * For booting Linux, the board info and command line data
@@ -136,7 +123,6 @@
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
 #      define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
-#      define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
 #      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
@@ -146,10 +132,6 @@
 #      define CONFIG_SYS_NAND_SIZE             1
 #      define CONFIG_SYS_NAND_BASE_LIST        { CONFIG_SYS_NAND_BASE }
 #      define NAND_ALLOW_ERASE_ALL     1
-#      define CONFIG_JFFS2_NAND        1
-#      define CONFIG_JFFS2_DEV         "nand0"
-#      define CONFIG_JFFS2_PART_SIZE   (CONFIG_SYS_CS2_MASK & ~1)
-#      define CONFIG_JFFS2_PART_OFFSET 0x00000000
 #endif
 
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_CS0_BASE
@@ -165,7 +147,6 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CONFIG_SYS_CACHELINE_SIZE      16
 
 #define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
                                         CONFIG_SYS_INIT_RAM_SIZE - 8)