* (easy to change)
*/
-#define CONFIG_MCFTMR
-
-#define CONFIG_MCFUART
-#define CONFIG_SYS_UART_PORT (0)
+#define CFG_SYS_UART_PORT (0)
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
. = DEFINED(env_offset) ? env_offset : .; \
env/embedded.o(.text);
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-
/* Available command configuration */
-#ifdef CONFIG_MCFFEC
-#define CONFIG_MII_INIT 1
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_SYS_RX_ETH_BUFFER 8
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#define CONFIG_HAS_ETH1
-/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
-#ifndef CONFIG_SYS_DISCOVER_PHY
-#define FECDUPLEX FULL
-#define FECSPEED _100BASET
-#else
-#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#endif
-#endif
-#endif
-
/* I2C */
-#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
-#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
-#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
-#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
-
-#define CONFIG_BOOTCOMMAND "bootm ffe40000"
-
-#ifdef CONFIG_MCFFEC
-# define CONFIG_NET_RETRY_COUNT 5
-# define CONFIG_OVERWRITE_ETHADDR_ONCE
-#endif /* FEC_ENET */
+#define CFG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
+#define CFG_SYS_I2C_PINMUX_CLR (0xFFF0)
+#define CFG_SYS_I2C_PINMUX_SET (0x000F)
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"save\0" \
""
-#define CONFIG_SYS_CLK 150000000
+#define CFG_SYS_CLK 150000000
/*
* Low Level Configuration Settings
* You should know what you are doing if you make changes here.
*/
-#define CONFIG_SYS_MBAR 0x40000000
+#define CFG_SYS_MBAR 0x40000000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
-#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+#define CFG_SYS_INIT_RAM_ADDR 0x20000000
+#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
*/
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-
-#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_SYS_MONITOR_BASE 0x20000
-#else
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
+#define CFG_SYS_SDRAM_BASE 0x00000000
+#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
-#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
+#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
-#define CONFIG_SYS_FLASH_SIZE 0x200000
+#define CFG_SYS_FLASH_SIZE 0x200000
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
-#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
- CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
+ CFG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
+ CFG_SYS_INIT_RAM_SIZE - 4)
+#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
+#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
CF_CACR_DISD | CF_CACR_INVI | \
CF_CACR_CEIB | CF_CACR_DCM | \
CF_CACR_EUSP)
/*-----------------------------------------------------------------------
* Memory bank definitions
*/
-#define CONFIG_SYS_CS0_BASE 0xffe00000
-#define CONFIG_SYS_CS0_CTRL 0x00001980
-#define CONFIG_SYS_CS0_MASK 0x001F0001
+#define CFG_SYS_CS0_BASE 0xffe00000
+#define CFG_SYS_CS0_CTRL 0x00001980
+#define CFG_SYS_CS0_MASK 0x001F0001
-#define CONFIG_SYS_CS1_BASE 0x30000000
-#define CONFIG_SYS_CS1_CTRL 0x00001900
-#define CONFIG_SYS_CS1_MASK 0x00070001
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_FECI2C 0x0FA0
+#define CFG_SYS_CS1_BASE 0x30000000
+#define CFG_SYS_CS1_CTRL 0x00001900
+#define CFG_SYS_CS1_MASK 0x00070001
#endif /* _M5275EVB_H */
projects / platform / kernel / u-boot.git / blobdiff