Merge branch '2022-11-10-symbol-migrations'

[platform/kernel/u-boot.git] / include / configs / M5253DEMO.h

diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index c27f0a5..f7bfe59 100644 (file)
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -8,8 +8,6 @@
 
 #include <linux/stringify.h>
 
-#define CONFIG_MCFTMR
-
 #define CONFIG_SYS_UART_PORT           (0)
 
 
@@ -21,13 +19,6 @@
        . = DEFINED(env_offset) ? env_offset : .; \
        env/embedded.o(.text*);
 
-#ifdef CONFIG_IDE
-/* ATA */
-#      define CONFIG_IDE_PREINIT       1
-#      undef CONFIG_LBA48
-#endif
-
-#define CONFIG_DRIVER_DM9000
 #ifdef CONFIG_DRIVER_DM9000
 #      define CONFIG_DM9000_BASE       (CONFIG_SYS_CS1_BASE | 0x300)
 #      define DM9000_IO                CONFIG_DM9000_BASE
@@ -82,8 +73,6 @@
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x20000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
  * Start addresses for the final memory configuration
@@ -93,27 +82,15 @@
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_SDRAM_SIZE          16      /* SDRAM size in MB */
 
-#ifdef CONFIG_MONITOR_IS_IN_RAM
-#      define CONFIG_SYS_MONITOR_BASE  0x20000
-#else
-#      define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_FLASH_BASE + 0x400)
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN         0x40000
-#define CONFIG_SYS_BOOTPARAMS_LEN      (64*1024)
-
 /*
  * For booting Linux, the board info and command line data
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization ??
  */
 #define CONFIG_SYS_BOOTMAPSZ           (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
-#define CONFIG_SYS_BOOTM_LEN           (CONFIG_SYS_SDRAM_SIZE << 20)
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE          (CONFIG_SYS_CS0_BASE)
-#define CONFIG_SYS_MAX_FLASH_SECT      2048    /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
 
 #define FLASH_SST6401B         0x200
 #define SST_ID_xF6401B         0x236D236D
@@ -125,12 +102,9 @@
  * 0x30 is block erase in SST
  */
 #      define CONFIG_SYS_FLASH_SIZE            0x800000
-#      define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
-#      define CONFIG_FLASH_CFI_LEGACY
 #else
 #      define CONFIG_SYS_SST_SECT              2048
 #      define CONFIG_SYS_SST_SECTSZ            0x1000
-#      define CONFIG_SYS_FLASH_WRITE_TOUT      500
 #endif
 
 /* Cache Configuration */
@@ -149,9 +123,6 @@
 #define CONFIG_SYS_CACHE_ICACR         (CF_CACR_CENB | CF_CACR_CEIB | \
                                         CF_CACR_DBWE)
 
-/* Port configuration */
-#define CONFIG_SYS_FECI2C              0xF0
-
 #define CONFIG_SYS_CS0_BASE            0xFF800000
 #define CONFIG_SYS_CS0_MASK            0x007F0021
 #define CONFIG_SYS_CS0_CTRL            0x00001D80